GB2031225A

GB2031225A - Glass-sealed thyristor junctions

Info

Publication number: GB2031225A
Application number: GB7931330A
Authority: GB
Original assignee: Westinghouse Electric Corp
Current assignee: CBS Corp
Priority date: 1978-09-15
Filing date: 1979-09-10
Publication date: 1980-04-16
Also published as: DE2937258A1; BR7905849A; BE878751A; CA1134057A; JPS58109268U; GB2031225B; JPS5558571A; IN152228B; FR2436499A1

Abstract

In a thyristor 20, a ring-shaped glass member 40 is affixed to a first major surface 23 of the body of semiconductive material to form a seal protecting the PN junction 21 between the first emitter region 24 and the first base region 26; and a second annular shaped glass member 46 is affixed to the edge of the body of semiconductive material to form a seal protecting the PN junctions formed between the first base region 26 and the second base region 28 and between the second base region 28 and the second emitter region 30. The ring-shaped glass members 40, 46 may be formed by heating glass preforms in an atmosphere comprising a predetermined mixture of nitrogen and water vapor to cause the glass preforms to soften and fuse to the surfaces of the body of semiconductive material. <IMAGE>

Description

SPECIFICATION Glass-sealed power thyristor The invention relates to semiconductor devices and more specifically to thyristors encapsulated by fusing glass directly to the body of semiconductor material.

Prior art semiconductor devices using glass fused directly to the semiconductor portion of the device as a sole means for protecting the PN junctions from the environment have been limited to relatively low current diodes. An example of such a diode is type UT4005 manufactured and sold by the Unitrode Corporation. It is also known in the prior art to encapsulate semiconductor devices in thermosetting resinous insulating material. It is the principal object of the invention to provide a novel thyristor using glass for encapsulation.

Examples of such hermetically sealed devices using resinous material are disclosed in U.S. Patent Nos.

3,475,662, 3,476,978, and 3,476,988 as well as 3,486,084. Thin glass protective layers are also available in the prior art to passivate semiconductor devices. These thin passivation layer was typically applied to the body of semiconductor material as a slurry and the device and the powered glass were heated to fuse the glass to form a passivating glass layer. Glass layers formed using this technique where limited in thickness to the order of 20 or 30 microns. These thin layers are not sufficient to provide complete environmental protection for the PN junctions within the semiconductor material.

With the aforesaid object in view, the invention resides in a thyristor having a body of semiconductor material with a first ring-shaped glass memberforming a seal protecting said PN junction between the first emitter region and the first base region of said body; and a second ring-shaped glass member forming a seal protecting the PN junction between the first base region and the second base region; and the PN junction between the second base region and the second emitter region.

The invention comprises a disc-shaped thyristor having the cathode and gate electrodes on one major surface and the anode electrode on a second major surface. The thyristor uses a disc-shaped body of semiconductor material having first and second substantially flat surfaces and an edge portion extending therebetween. The body of semiconductor material includes a first emitter region, a first base region, a second base region and a second emitter region. The first emitter and base regions extend to one surface of the body of semiconductor material. Cathode and gate electrodes are respectively affixed to the first emitter region and the first base region. The second emitter region extends to a second surface of the body of semiconductor material and the anode electrode is affixed thereto.A seal protecting a PN junction formed at the interface of the first emitter region and the first base region is formed by a first ring-shaped glass member fused to the first surface of the body of semiconductor material. A second ring shaped glass member is fused to the edge portion of the body of semiconductor material to provide a seal protecting PN junctions formed at the interface of the first and second base regions and at the interface of the second base region with the second emitter region.

The invention will become more readily apparent from the following exemplary description in context with the accompanying drawings, wherein: Figure 1 is a drawing in partial cross section illustrating the preferred embodiment of the invention.

Figure 2 is a drawing partially in cross section illustrated in a second embodiment of the invention.

Figure 3 is a drawing partially in cross section illustrated in a third embodiment of the invention.

Figure 4 is a drawing partially in cross section illustrating a fourth embodiment of the invention.

Figure 5 is a drawing partially in cross section illustrated in another embodiment of the invention.

Figure 6 is a drawing illustrating a first ring-shaped glass preform.

Figure 7 is a drawing illustratng a second ring-shaped glass preform.

Figure 8 is a drawing illustrating a jig used to hold the components of the thyristor.

Figure 9 is a time-temperature chart of the fusion furnace.

A disc-shaped thyristor comprising the preferred embodiment of the invention is illustrated in Figure 1.

The thyristor 20 includes a body of semiconductor material 22 (preferably silicon) having first and second substantially parallel opposed major surfaces 19 and 23 and an edge portion 27 extending therebetween.

The body of semi-conductor material 22 includes a first N conducting type emitter region 24, a first P conductivity type base region 26, a second N conductivity type base region 28 and a second P conductivity type emitter region 30. Cathode, gate and anode electrodes 32, 34 and 36 are respectively affixed to the first emitter region 24, the first base region 26 and the second emitter region 30. A PN junction 21 is formed at the interface of the first emitter region 24 with the first base region 26. This PN junction extends to the upper surface 23 off the body of semiconductor material 22. A second PN junction 25 is formed at the interface of the first base region 26 and the second base region 28. The PN junction 25 extends to the edge portion 27 of the body of semiconductor material 22.Similarly a third PN junction 29 is formed at the interface of the second base region 28 and the second emitter region 30. This junction also extends to the edge portion 27 of the body of semiconductor material 22. The fusion utilized by the thyristor 20 consist of the body of semiconductor material 22 having the cathode, gate and anode electrodes 32, 34 and 36 affixed thereto, as described above.

The cathode electrode 32 is disc shaped and includes an outer edge 35. The gate electrode 34 is cup shaped and includes an inner edge 38. A ring-shaped glass member 40 is fused to the upper surface 23 of the body of semiconductor material 22 as well as the outer surface 35 of the cathode electrode 32 and the inner surface 38 of the gate electrode 34. The ring-shaped glass member 40 over-lies PN junction 21 to provide a hermetic seal protecting this junction. A second ring-shaped electrical insulating glass member 46 is fused to the edge portion 27 of the body of semiconductor material 22, to edge 48 of the anode electrode 36 and to inner surface 50 of the gate electrode 34. The second ring-shaped electrically insulating glass member 46 provides a hermetic seal protectng the edge portion 27 of the body of semiconductor material 22.

The cathode electrode 32, gate electrode 34 and anode electrode 36 are preferably made of a metal such as molybdenum, tungsten or tantalum for example. The cathode and gate electrodes 32 and 34 are preferably affixed to the body of semiconductor material 22 by first forming a thin layer of electrodeless nickel on the surfaces of the body of semiconductor material 22 and silver soldering the electrodes thereto. The anode electrode 36 may be silver soldered to the second emitter region 30. The melting point of the silver solder used should be above the fusion temperature of (approximately 720 C) of the ring-like glass member 40 and 46. The processes for affixing the cathode, gate and anode electrodes 32, 34 and 36 are well known in the art.

The thicknesses of the cathode electrode 32, the gate electrode 34 and the anode electrode 36 must be selected such that destructive stresses do not develop during temperature cycling of the thyristor 20. Typical thickness for the cathode, gate and anode electrodes, 32, 34 and 36 are respectively in the order of 0.010, 0.010 and 0.035 inches. A typical diameter for the body of semiconductor material 22 is 0.650. Cathode electrode 32 has a typical diameter of 0.350 inches. A typical inner diameter for the gate electrode 34 is 0.045 inches. Ring-shaped glass member 46 has a typical width of 0.015 inches. The body of semiconductor material 22 has a typical thickness of 0.010 inches.

A second thyristor 220 comprising a second embodiment of the invention is illustrated in Figure 2. The reference numerals used in Figure 1 preceded by a two are used in Figure 2 to identify similar parts. The thyristor 220 includes a body of semiconductor material 222 having substantially parallel opposed major surfaces 223 and 219 and an edge portion 227 extending therebetween. The body of semiconductor material 222 includes a first emitter region 224 a first base region 226, a second base region 228, and a second emitter region 230. Cathode, gate and anode electrodes 232, 234, and 236 are respectively affixed to the first emitter region 224, the first base region 226 and the second emitter region 230. A ring-like glass member 240 is fused to the upper surface 223 of the body of semiconductor material 222 to provide a hermetic seal protecting PN junction 221.Similarly a second ring-like glass member 246 is fused to the edge portion 227 to provide a hermetic seal protecting this edge of the body of semiconductor material 222. Thyristor 220 is identical to the thyristor 20 illustrated in Figure 1 except that the anode electrode 236 is cup-shaped as compared to the disc-shaped anode electrode 36 of thyristor 20 illustrated in Figure 1.

Figure 3 is a third thyrisor 320 comprising a third embodiment of the invention. The reference numerals utilized in Figure 1 preceded by a three have been utilized to identify similar parts. Thyristor 320 includes a body of semiconductor material 322 having substantially parallel opposed major surfaces 323 and 319 and an edge portion 327 extending therebetween. The body of semiconductor material 322 includes a first emitter 324 a first base region 326, a second base region 328, and a second emitter region 330. Cathode, gate and anode electrodes 332, 334 and 336 are respectively affixed to the first emitter region 324 the first base region 326 and the second emitter region 330.A ring-shaped glass member 340 is fused to the upper surface 323 of the body of semiconductor material 322 and to the edges of cathode electrode 332 and gate electrode 334 to form a hermetic seal protecting PN junction 321. Similarly, a second ring-shaped glass member 346 is fused to the edge portion 327 of the body of semiconductor material 322 to form a hermetic protecting this edge. Thyristor 320 is identical to thyristor 20, illustrated in Figure 1, except that the cathode electrode 332 is cup-shaped and gate electrode 334 includes an upward extending rim portion 342 along its inner edge. The combination of the cup-shaped cathode electrode 332 and the rim portion 342 of gate electrode 334 provides additional surface to which glass member 340 is fused.

A fourth thyristor 420 which comprises a fourth embodiment of the invention is illustrated in Figure 4. The reference numerals utilized in Figure 1 preceded by a four have been used to identify functionally similar parts. Thyristor 420 includes a body of semiconductor material 422 having substantially parallel opposed major surfaces, 423 and 419, and an edge portion 427 extending therebetween. The body of semiconductor material 422 includes a first emitter 424, a first base region 426, a second base region 428 and a second emitter region 430. Cathode, gate and anode electrodes 432, 434 and 436 are respectively affixed to the first emitter region 424, the first base region 426 and the second emitter region 430.A ring-shaped glass member 440 is fused to the upper surface 423 of the body of semiconductor material 422 and to the edge of cathode electrode 432 and gate electrode 434 to form a hermetic seal protecting PN junction 421. A second ring-shaped glass member 446 is fused to the outer edge portion 427 of the body of semiconductor material 422 to form a hermetic seal protecting this edge.

Thyristor 420 is identical to the thyristor 20, illustrated in Figure 1, except that the position of the first emitter region 424 and the first base region 426 have been reversed from the functionally similar first emitter and base region 23 and 26 of transistor 20 illustrated in Figure 1.

A fifth thyristor 520 which comprises another embodiment of the invention is illustrated in Figure 5. In Figure 5, the reference numerals utilized in Figure 1 preceded by a number five are used to identify structurally and functionally similar parts. The thyristor 520 includes a body of semiconductor material 522 having first and second substantially parallel opposed major surfacos, 523 and 519 and an edge portion 527 extending therebetween. The body of semiconductor material 522 ncludes a first emitter region 524, a first base region 526, a second base region 528 and a second emitter ref ion 530. Cathode, gate and anode electrodes 532, 534 and 536 are respectively affixed to the first emitter region 524, the first base region 526 and the second emitter region 530.

A ring-shaped glass member 540 is fused to the upper surface 523 of the body of semiconductor material 522 and the edges of cathode electrode 523 and gate electrode 534. A thin electrically insulating layer 546A, of silicon oxide for example, overlies and is fused to the edge portion 527 of the body of semiconductor material 522. Ring-shaped glass member 546 is fused to the thin electrically insulating layer 546A, the edge of anode electrode 536 and the inner surface of gate electrode 534 to form a hermetic seal protecting the edge portion 527 of the body of semiconductor material 522. Thyristor 520 is identical to thyristor 20 (Figure 1) except for the thin electrically insulating layer 546A overlying edge portion 527 of the body of semiconductor material 522.The combination of the thin electrically insulating layer 546A and ring-shaped glass member 546 forms a hermetic seal protecting edge portion 527. This structure has the additional characteristic that the material for electrically insulating layer 546A can be selected for its electrical characteristics and the glass for ring-shaped glass member 546 for its thermal and mechanical properties.

The processes for constructing the various embodiments of the thyristor illustrated in Figures 1 through 5 are very similar. Therefore, the process for constructing thyristor 20 illustrated in Figure 1 will be described followed by a description of the modifications necessary to construct the other embodiments.

The first step in constructing the thyristor 20 is to form the first emitter, first base, second base and the second emitter regions 24,26,28 and 30 in the body of semiconductor material 22. After these regions have been formed using conventional diffusion processes, for example, the anode electrode 36 is affixed to the second emitter region 30 along surface 19 by silver soldering, for example. Sand blasting is used to remove the edge of the body of semiconductor material 22 to form sloping edge portion 27. Cathode and gate electrodes 32 and 34 are affixed to the body of semiconductor material 22 by forming a thin layer of electrodeless nickel on upper surface 23 and silver soldering electrodes 32 and 34 thereto.

It is preferable that the cathode electrode 32 and the gate electrode 34 be affixed to the body of semiconductor material 22 using a non-alloying process which prevents diffusion regions from forming in the body of semiconductor materal 22 because diffusion regions can cause stresses to develop in areas near the inner edge 38 of the gate electrode 34 and the outer edge 35 of the cathode electrode 22. These stresses can result in fracture of the body of semiconductor material 22. It is also desirable that the electrodes be affixed to the body of semiconductor material 22 using a process requiring a temperature in excess of the melting temperature (approximately 700 C) of the glass used for the first glass ring-like glass member 40 and the second ring-like glass member 46.

A suitable process for affixing the cathode electrode 32 and the gate electrode 34 to the body of semiconductor material 22 is to form a thin layer of electrodeless nickel on the upper surface 23 of the body of semiconductor material 22. The cathode electrode 32 and the gate electrode 34 are then silver soldered to the body of semiconductor material 22. Silver solders are available for performing this operation in the neighborhood of 9000C which is above the melting point for the ring-like glass members 40 and 46. During the silver soldering process the electrodeless nickel assures a good adhesion to the body of semiconductor material 22 and prevents the undesirable diffusion regions, common with alloying processes, from forming.

Suitable processes for applying the electrodeless nickel and for silver soldering the electrodes, 32 and 34 to the body of semiconductor material 22 are well known in the semiconductor art.

After the electrodes 32,34 and 36 have been affixed to the body of semiconductor material 22 a first ring-shaped glass preform 640 (Figure 6) is fused to the inner edge 38 of the gate electrode 34, the outer edge 35 of the cathode electrode 32 and the upper surface 23 of the body of semiconductor material 22 to produce the first ring-shaped glass member 40 and a second ring-shaped glass preform 646 (Figure 7) is fused to the outer surface 27 of the body of semiconductor material 22, the edge of the anode elelctrode 36 and the lower surface of the gate electrode 34 to produce the second ring-shaped glass member 46.

The first step in fusing the glass preforms 640 and 646 to form the thyristor 20 is to clean the fusion and the ring-shaped glass preforms 640 and 646 using the following procedure: (a) boil all the components in a reagent grade trichloroethylene; (b) rinse all the components twice (one minute each time) in reagent grade trichloroethylene; (c) rinse all the components ultrasonically (one minute each time) in reagent grade acetone; and (d) dry the components in room air on filter paper.

Following cleaning as described above, the components are assembled n a jig as illustrated in Figure 8.

The jig includes a base member 60 having a recess 62 therein. The diamett r of the recess 62 is selected such that the outer diameter of the gate electrode 34 fits snugly inside the recess 62. The ring-shaped glass preform 640 is positioned in the area between the cathode electrode 32 and the gate electrode 34. The second ring-shaped glass preform 646 is then positioned between the edge portion 27 of the body of semiconductor 22 and the inner edge of the gate electrode 34. The height of the first glass preform 640 is selected such that when assembled as shown in Figure 8, the upper edge of the ring-shaped glass member 640 extends slightly above the cathode electrode 32 and the edge of the gate electrode 34. Similarly, the height of the second ring-shaped glass preform 646 is selected such that it extends above the top edge of the gate electrode 34 and the anode electrode 36. A graphite weight 64 is then positioned to rest on the upper edge of the ring-shaped glass preform 646. The components as assembled in Figure 8 are then placed in a furnace and heated to fuse the ring-shaped glass preform 640 to form the ring-shaped member 40 and the second ring-shaped preform 646 to form the ring-shaped member 46.

The components as assembled in the jig are placed in a fusion furnace and an atmosphere which consists of a mixture of nitrogen and water vapor having a total pressure of one atmosphere with the partial pressure of the water vapor being between 10-3 to 1 of2 atmospheres is established therein. The required atmosphere is achieved by mixing approximately two parts of dry nitrogen with one part of wet nitrogen and flowing the mixture through the furnace. Dry nitrogen is passed through one inch of deonized water in a bubbler to form the required wet nitrogen. After the required atmosphere has been established, the temperature in the furnace is increased and decreased in accordance with a preselected time temperature schedule illustrated in Figure 9.

As can be seen from Figure 9, the temperature of the furnace is initially in the range of 350 C. The temperature is increased to a temperature in the range of 700 to 7200C in a time interval of approximately 25 minutes. This temperature is maintained for a period of approximately 20 minutes. The ring-shaped glass preforms 640 and 646 become soft and begin to flow at a temperature in the range of 700 C. Wetability of the silicon for the glass and pressure due to the top plate 64 causes a soft glass to flow evenly along the edges of the body of semiconductor material 22 and the edges of the electrodes.The cross section of the ring-shaped glass preform 646 is selected such that there is just sufficient material available to fill the area between the edge portion 27 of the body of semiconductor material 22 and the inner surface of the gate electrode 34. This results in the ring-like glass member 46 having the cross section as illustrated in Figure 1. Similarly, the second ring-shaped glass preform 640 softens and fuses to the inner edge 38 of the gate electrode, the upper surface 23 of the body of semiconductor material 22 and the inner edge 38 of the gate electrode. The dimensions of this ring are also selected such that there is just sufficient material available to fill the region between the cathode electrode 32 and the gate electrode 34.

After a temperature in the range of 700 to 7200C has been maintained for approximately 20 minutes the temperature of the furnace is reduced to approximately 5250C in a time interval of approximately 15 minutes.

A temperature of 525 C is maintained for approximately 10 minutes followed by a reduction to 4800C in a time interval of 15 minutes. A temperature of 4800C is maintained for 20 minutes followed by a reduction to 41 00C in a time interval of approximately 15 minutes. The 41 00C temperature is maintained for 30 minutes followed by a reduction to room temperature in a time interval of approximately 30 minutes.

In selecting the glass for the ring-shaped glass preform 640 and 646 it is important the thermal expansion coefficients for the glass be matched to or greater than the temperature expansion coefficient of the semiconductor body 22. It should also be noted that the expansion characteristics of the glass with temperature are different from its contraction characteristics when a glass is cooled. All these characteristics must be considered in selecting a glass and a temperature cycle for the fusion furnace.

Suitable glasses for the ring-shaped preforms 640 and 646 have a temperature expansion coefficient in the range of 4.0 to 6.0 x 10-6 centimeter/centimeter/#C and the glass should be substantially free of alkali ions. In addition, (1) the glasses must have structural stability, e.g., must not be devitrify or go through detrimental phase separations during the fusion process; (2) the glass must have good chemical resistance to the environment ar d humidity; (3) the glass must have thermal expansion characteristics compatible n ith those of the fusion; (4) the glass must wet and adhere to the semiconductor material; (5) the glass must have a viscosity low enough to flow; (6) the glass must not chemically attack the surface of the semiconductor or the electrodes in a detrimental way;; (7) the thermal characteristics of the glass must be such that stresses can be relieved at temperatures within the limitations of the thyristors; (8)the glass must have a fusion temperature below the degradation temperature of the thyristor; (9) the finished thyristor must be resilient against thermal shock, thermal cycling and have good mechanical strength.

Glasses having a composition by weight of: Constituent Percentage SiO2 32-40% B203 12-33% PbO 42-48% Awl203 2-6% have been found to be suitable for the ring-shaped glass preforms 640 and 646.

In particular, a glass having a composition of; Constituent Percentage SiO2 36+4% B203 1 5+3% PbO 45+#3% Awl203 3+1% have been found to be particularly satisfactory. This glass is sold commercially by Inotec under Type No.

1P745.

It has been found that mere uniform electrical characteristics are obtained when ring-shaped glass preforms which are cut from stress relieved glass tubing are used. These superior results are believed to be related to the fact that the prefabricated glass rings of this type have smoother interior surfaces and consistent prior thermal histories.

The other embodiments of the thyristor illustrated in Figures 2 through 5 can be constructed using essentially the same process discussed above for fabricating the thyristor 20 illustrated in Figure 1. The primary exception is thyristor illustrated in Figure 5. In this embodiment the thin insulating layer 546C is formed prior to the fusion of the ring-shaped glass preforms 640 and 646 to form ring-shaped glass members 40 and 46. This layer can be formed by depositing silicon oxide on the edge 527 of the body of semiconductor material 522. This oxide can also be grown utilizing well-known prior art processes. Once the insulating layer 546A has been formed, the remainder of the fabrication cycle is identical to the one described above with respect to the thyristor 20 illustrated in Figure 2.

Claims

1. A thyristor having a body of semiconductor material with a first ring-shaped glass member forming a seal protecting the PN junction between the first emitter region and the first base region of said body; and a second ring-shaped glass member forming a seal protecting the PN junction between the first base region and the second base regions; and the PN junction between the second base region and the second emitter region.

2. A thyristor in accordance with claim 1 wherein a gate electrode is cup-shaped with the inner diameter of the rim portion being greater than the diameter of thed anode electrode.

3. A thyristor in accordance with claim 2 wherein said gate electrode covers the outer periphery of the second ring member and additionally covers the portion of the second ring between the first base region and the periphery with upper surface of said cathode electrode.

4. A thyristor in accordance with claim 1, 2 or 3 including a cathode electrode with the first ring member.

5. A thyristor in accordance with claim 2, 3 or 4 wherein claim 4 is dependent from claim 2, wherein said body, said cathode electrode, said first and second ring members, and said gate electrode are coaxial.

6. A thyristor in accordance with any of the preceding claims wherein said first and second ring-shaped glass members are substantially free of alkali elements.

7. A thyristor in accordance with claim 6 wherein said first and second ring-shaped glass members are composed of by weight 36% + 4% SiO2, 17.5% i 5.5% B203, 45% t 3% PbO and 4.0% i 2% Awl203.

8. Athyristor substantially as hereinbefore described with reference to, and as illustrated in, the accompanying drawings.