GB2028583A - Electrical lead for a semiconductor device - Google Patents

Electrical lead for a semiconductor device Download PDF

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Publication number
GB2028583A
GB2028583A GB7927031A GB7927031A GB2028583A GB 2028583 A GB2028583 A GB 2028583A GB 7927031 A GB7927031 A GB 7927031A GB 7927031 A GB7927031 A GB 7927031A GB 2028583 A GB2028583 A GB 2028583A
Authority
GB
United Kingdom
Prior art keywords
body portion
lead
insulating material
wall
trough
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB7927031A
Other versions
GB2028583B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AEI Semiconductors Ltd
Original Assignee
AEI Semiconductors Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AEI Semiconductors Ltd filed Critical AEI Semiconductors Ltd
Priority to GB7927031A priority Critical patent/GB2028583B/en
Publication of GB2028583A publication Critical patent/GB2028583A/en
Application granted granted Critical
Publication of GB2028583B publication Critical patent/GB2028583B/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4822Beam leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12032Schottky diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Abstract

A semiconductor device comprising a semiconductor body portion (1) encircled by a supporting wall (3) of electrically insulating material, e.g. glass, which also provides support for an electrical connecting lead (11 or 13) secured thereto, to a region of the body portion. The s.c. body portion typically includes a Schottky barrier diode wherein the electrical conductor 13 has a reduced area portion contacting a gallium-arsenide epitaxial layer 9 to reduce diode capacitance. A method is described for the simultaneous fabrication of a number of diodes in a single wafer of low resistivity gallium- arsenide. Areas of the water, each containing a diode, are then separated from each other. <IMAGE>

Description

SPECIFICATION Semiconductor devices This invention relates to semiconductor devices.
The invention relates particularly to semiconductor devices wherein connection to one or more regions of the device is made by way of a beam lead.
In such devices a conflict arises between the need for the beam leads to be securely fixed and have good mechanical strength and the need for the stray impedances, especially capacitance, attributable to the beam leads to be kept to a minimum. The conflict is particularly acute, of course, in devices intended for operation at high frequencies e.g. microwave frequencies.
It is an object of the present invention to provider a semiconductor device wherein this problem is alleviated.
According to the present invention there is provided a semiconductor device comprising: a semiconductive body portion; a wall of electrically insulating material encircling the body portion; and a lead making electrical connection with a region of the body portion, which lead extends at least partly across said wall and is secured thereto.
Preferably the lead extends across and is secured to a surface of the wall which constitutes a lateral extension of a surface of the body portion The wall of insulating material preferably provides a surface which constitutes a lateral extension of said surface of the body portion all round the body portion.
In a device according to the invention the encircling wall of insulating material not only provides a base to which the or each lead can be satisfactorily secured without introducing excessive stray impedance, but also confers good mechanical strength on the device.
The invention also provides a convenient method of manufacturing a semiconductor device according to the invention including the steps of forming a trough extending into a semiconductor wafer from a surface thereof and filling the trough with electrically insulating material, thereby to isolate a portion of said surface of the wafer from the remainder of that surface; forming a semiconductor device extending into the part of the wafer beneath said isolated surface; and forming a lead for a region of the device, which lead extends at least partly across and is secured to the surface of the insulating material in said trough.
For the manufacture of discrete devices the method will further include the step of separating from the remainder of the wafer the portion of the wafer containing the device, the surrounding insulating material and said lead.
One semiconductor device in accordance with the invention and its method of manufacture will now be described by way of example with reference to the accompanying drawings in which: Figure 1 is a perspective view of the device; Figure 2 is a sectional view of the device; Figure 3 is an enlarged plan view of part of the device; and Figure 4 is a sectional view illustrating a stage in the manufacture of the device.
The device is a Schottky barrier diode for use at microwave frequencies.
Referring to Figures 1, 2 and 3 the device comprises a generally rectangular body portion consisting for the most part of low resistivity gallium arsenide 1. The body portion 1 is encircled by a wall of glass 3, the top and bottom surfaces of the wall being essentially coplanar with, and thus forming lateral extensions of, the corresponding surfaces of the body portion 1, which surfaces are approximately square.
Over a small D-shaped area at the center of one side of one of the square surfaces there is a thin epitaxial layer 5 of high resistivity gallium arsenide. Over the remainder of that square surface there is a thin layer 7 of metal, e.g. a gold/tin alloy, which makes ohmic contact with the underlying low resistivity gallium arsenide. On the surface of the epitaxial layer 5 there is a silicon oxide layer 8 provided with a window through which a small circular area 9 of a suitable metal e.g. titanium makes the required Schottky barrier contact with the underlying epitaxial layer 5.
Connection to the metal layer 7 is made by way of a metal beam lead 1 1 which extends across and is secured to the adjacent part of the top planar surface of the wall 3. Connection to the circular metal area 9 is made by way of a second metal beam lead 13 similarly secured to and extending across the surface of the wall 3. The lead 13 is of reduced width at its inner end to reduce the area of overlap of the lead 13 and the layer 5, and hence reduce the capacitance of the diode.
The bottom of the body portion 1 is provided with a protective metal layer 15.
The leads 1 and 1 3 suitably consist of gold and the layer 15 is suitably a composite titanium/gold layer.
Referring to Figure 4, in manufacture a number of diodes are fabricated simultaneously on a single wafer 17 of low resistivity gallium arsenide having a high resistivity epitaxial layer 19 on one main face. At each location on the wafer 17 where a diode is required to be formed, a square trough 21 is first formed using a photolithographic etching technique, the trough 21 extending into the wafer 17 from the side carrying the epitaxial layer 19, and encircling a portion 23 of the wafer which will constitute the body portion 1 of the completed device.
The trough 21 is then filled to the surface of the wafer 17 with a low melting point glass frit of approximately micrometre sized glass particles in a suitable suspension medium, for example photoresist. The glass frit is then vitrified by heating. The metal layer 7 is then deposited in conventional manner, through a window in a photolithographically defined silicon oxide mask, the epitaxial layer 19 being removed before metal deposition in the area exposed through the oxide mask so that the metal layer 7 contacts the low resistivity portion of the wafer.
The Schottky barrier contact metal area 9 is then deposited in similar manner on the surface of the remaining part of the epitaxial layer 19 within the area enclosed by the glass filling 25 in the trough 21.
The beam leads 1 1 and 13 are then formed in conventional manner by photolithographic definition of an evaporated layer and subsequent electroplating to bring the leads up to the desired thickness.
The reverse side of the wafer is then lapped or etched until the bottom Qf the glass filling 25 in the trough 21 is clearly exposed. The metal protective layer 1 5 is then formed by evaporation.
Finally, the various areas of the wafer each containing a diode are separated from one another, and excess gallium arsenide around the outside of the glass wall 3 of each diode is removed by etching, leaving a completed diode as shown in Figure 1.
If necessary, to protect the glass in the trough 21 from etchants used during subsequent processing, the walls of the trough and the exposed surface of the glass in the trough maybe provided with protective layers, e.g. of silicon oxide, to provide a protective coating all around the glass.
It will be appreciated that the invention is applicable not only to Schottky barrier diodes but to virtually any semiconductor device eniploying beam leads, or leads of such a form that they may introduce undesirable stray impedance.

Claims (16)

1. A semiconductor device comprising: a semiconductive body portion; a wall of electrically insulating material encircling the body portion; and a lead making electrical connection with a region of the body portion, which lead extends at least partly across said wall and is secured thereto.
2. A device according to Claim 1 wherein the lead extends across and is secured to a surface of the wall which constitutes a lateral extension of a surface of the body portion.
3. A device according to Claim 2 wherein the wall of insulating material provides a surface which constitutes a lateral extension of said surface of the body portion all round the body portion.
4. A device according to Claim 3 wherein the height of the wall is substantially equal to the thickness of the body portion.
5. A device according to any one of the preceding claims wherein said lead is in the form of an electrically conductive layer.
6. A device according to Claim 5 wherein the part of the lead making electrical connection with a region of the body portion is of smaller width than the part of the lead extending across said wall.
7. A device according to any preceding claim wherein said body portion is of generally rectangular form.
8. A device according to any preceding claim wherein said insulating material is a glass.
9. A device according to any preceding claim wherein the lead extends right across and beyond said wall to form a beam lead for the device.
10. A semiconductor device substantially as hereinbefore described with reference to Figures 1 and 2.
11. A method of manufacturing a semiconductor device according to Claim 1 including the steps of forming a trough extending into a semiconductor wafer from a surface thereof and filling the trough with electrically insulating material, thereby to isolate a portion of said surface of the wafer from the remainder of that surface; forming a semiconductor device extending into the part of the wafer beneath said isolated surface; and forming a lead for a region of the device, which lead extends at least partly across and is secured to the surface of the insulating material in said trough.
12. A method according to Claim 11 wherein said trough is filled by placing particles of said insulating material in the trough and fusing them.
13. A method according to Claim 1 1 or Claim 12 further including the step of separating from the remainder of the wafer the portion of the wafer containing the device, the surrounding insulating material and said lead.
14. A method according to Claim 13 wherein prior to the separating step the thickness of the wafer is reduced from the surface opposite said isolated surface by an amount sufficient to expose the bottom of the insulating material in the trough.
15. A method of manufacturing a semiconductor device according to Claim 1 substantially as hereinbefore described with reference to Figure 3.
16. Asemiconductordevice manufactured bya method according to any one of Claims 11 to 1 5.
GB7927031A 1978-08-02 1979-08-02 Electrical lead for a semiconductor device Expired GB2028583B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB7927031A GB2028583B (en) 1978-08-02 1979-08-02 Electrical lead for a semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB7832015 1978-08-02
GB7927031A GB2028583B (en) 1978-08-02 1979-08-02 Electrical lead for a semiconductor device

Publications (2)

Publication Number Publication Date
GB2028583A true GB2028583A (en) 1980-03-05
GB2028583B GB2028583B (en) 1983-01-06

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
GB7927031A Expired GB2028583B (en) 1978-08-02 1979-08-02 Electrical lead for a semiconductor device

Country Status (1)

Country Link
GB (1) GB2028583B (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2520931A1 (en) * 1982-02-02 1983-08-05 Thomson Csf COLLECTIVE METHOD OF MANUFACTURING MICROFREQUENCY DIODES WITH INCORPORATED ENCAPSULATION AND DIODES OBTAINED THEREBY
FR2540290A1 (en) * 1983-01-28 1984-08-03 Thomson Csf Ultrahigh-frequency diode having a small stray (parasitic) capacitance, and process for producing such a diode
EP0117335A1 (en) * 1983-02-28 1984-09-05 Hewlett-Packard Company High speed photodiodes
FR2559959A1 (en) * 1984-02-21 1985-08-23 Thomson Csf Microwave diode with external connections taken by means of beams and its method of production.
US4733290A (en) * 1986-04-18 1988-03-22 M/A-Com, Inc. Semiconductor device and method of fabrication
FR2628569A1 (en) * 1988-03-08 1989-09-15 Thomson Hybrides Microondes Hyperfrequency switching IC mfr. on silicon substrate - covering water dielectric layers which are etched off at selected locations to define islands separated by glass-filled recesses
FR2647964A1 (en) * 1989-06-06 1990-12-07 Thomson Csf LOW CAPACITY COMPONENT, IN PARTICULAR DIODE PIN IN CHIP
EP1014444A1 (en) * 1999-05-14 2000-06-28 Siemens Aktiengesellschaft Integrated circuit with protection layer and fabrication method therefor

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2520931A1 (en) * 1982-02-02 1983-08-05 Thomson Csf COLLECTIVE METHOD OF MANUFACTURING MICROFREQUENCY DIODES WITH INCORPORATED ENCAPSULATION AND DIODES OBTAINED THEREBY
EP0085607A2 (en) * 1982-02-02 1983-08-10 Thomson-Csf Process for the simultaneous production of hyperfrequency diodes having an incorported encapsulation and diodes made by said process
EP0085607A3 (en) * 1982-02-02 1983-08-24 Thomson-Csf Process for the simultaneous production of hyperfrequency diodes having an incorported encapsulation and diodes made by said process
FR2540290A1 (en) * 1983-01-28 1984-08-03 Thomson Csf Ultrahigh-frequency diode having a small stray (parasitic) capacitance, and process for producing such a diode
EP0117335A1 (en) * 1983-02-28 1984-09-05 Hewlett-Packard Company High speed photodiodes
FR2559959A1 (en) * 1984-02-21 1985-08-23 Thomson Csf Microwave diode with external connections taken by means of beams and its method of production.
US4733290A (en) * 1986-04-18 1988-03-22 M/A-Com, Inc. Semiconductor device and method of fabrication
FR2628569A1 (en) * 1988-03-08 1989-09-15 Thomson Hybrides Microondes Hyperfrequency switching IC mfr. on silicon substrate - covering water dielectric layers which are etched off at selected locations to define islands separated by glass-filled recesses
FR2647964A1 (en) * 1989-06-06 1990-12-07 Thomson Csf LOW CAPACITY COMPONENT, IN PARTICULAR DIODE PIN IN CHIP
EP0402188A1 (en) * 1989-06-06 1990-12-12 Thomson-Csf Low capacity chip component, in particular PIN chip diode
EP1014444A1 (en) * 1999-05-14 2000-06-28 Siemens Aktiengesellschaft Integrated circuit with protection layer and fabrication method therefor

Also Published As

Publication number Publication date
GB2028583B (en) 1983-01-06

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PCNP Patent ceased through non-payment of renewal fee