GB202015075D0 - A device for laying and recycling speed bumps - Google Patents
A device for laying and recycling speed bumpsInfo
- Publication number
- GB202015075D0 GB202015075D0 GBGB2015075.1A GB202015075A GB202015075D0 GB 202015075 D0 GB202015075 D0 GB 202015075D0 GB 202015075 A GB202015075 A GB 202015075A GB 202015075 D0 GB202015075 D0 GB 202015075D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- laying
- speed bumps
- recycling speed
- recycling
- bumps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010500960.XA CN111710683A (en) | 2020-06-04 | 2020-06-04 | Three-dimensional memory and preparation method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB202015075D0 true GB202015075D0 (en) | 2020-11-11 |
Family
ID=72538881
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GBGB2015075.1A Ceased GB202015075D0 (en) | 2020-06-04 | 2020-09-24 | A device for laying and recycling speed bumps |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN111710683A (en) |
| GB (1) | GB202015075D0 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112687699B (en) * | 2020-12-24 | 2023-12-26 | 长江存储科技有限责任公司 | Three-dimensional memory and preparation method thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102091729B1 (en) * | 2013-10-10 | 2020-03-20 | 삼성전자 주식회사 | Method of manufacturing a three dimensional semiconductor memory device and the three dimensional semiconductor memory device fabricated by the method |
| KR102385568B1 (en) * | 2017-07-13 | 2022-04-12 | 삼성전자주식회사 | Vertical-type memory device |
| CN107994027B (en) * | 2017-11-21 | 2020-09-25 | 长江存储科技有限责任公司 | Method for reducing load effect influence in SONO etching |
| CN108847413A (en) * | 2018-08-31 | 2018-11-20 | 长江存储科技有限责任公司 | 3D memory device |
-
2020
- 2020-06-04 CN CN202010500960.XA patent/CN111710683A/en active Pending
- 2020-09-24 GB GBGB2015075.1A patent/GB202015075D0/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| CN111710683A (en) | 2020-09-25 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AT | Applications terminated before publication under section 16(1) |