GB201017743D0 - Data processing units - Google Patents

Data processing units

Info

Publication number
GB201017743D0
GB201017743D0 GBGB1017743.4A GB201017743A GB201017743D0 GB 201017743 D0 GB201017743 D0 GB 201017743D0 GB 201017743 A GB201017743 A GB 201017743A GB 201017743 D0 GB201017743 D0 GB 201017743D0
Authority
GB
United Kingdom
Prior art keywords
data processing
processing units
units
data
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB1017743.4A
Other versions
GB2484901A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bluwireless Technology Ltd
Original Assignee
Bluwireless Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bluwireless Technology Ltd filed Critical Bluwireless Technology Ltd
Priority to GB1017743.4A priority Critical patent/GB2484901A/en
Publication of GB201017743D0 publication Critical patent/GB201017743D0/en
Priority to US13/880,473 priority patent/US9285793B2/en
Priority to PCT/GB2011/052042 priority patent/WO2012052774A2/en
Publication of GB2484901A publication Critical patent/GB2484901A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8092—Array of vector units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computing Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
GB1017743.4A 2010-10-21 2010-10-21 Data processing unit with scalar processor, vector processor array, parity and FFT accelerator units Withdrawn GB2484901A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB1017743.4A GB2484901A (en) 2010-10-21 2010-10-21 Data processing unit with scalar processor, vector processor array, parity and FFT accelerator units
US13/880,473 US9285793B2 (en) 2010-10-21 2011-10-20 Data processing unit including a scalar processing unit and a heterogeneous processor unit
PCT/GB2011/052042 WO2012052774A2 (en) 2010-10-21 2011-10-20 Data processing units

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1017743.4A GB2484901A (en) 2010-10-21 2010-10-21 Data processing unit with scalar processor, vector processor array, parity and FFT accelerator units

Publications (2)

Publication Number Publication Date
GB201017743D0 true GB201017743D0 (en) 2010-12-01
GB2484901A GB2484901A (en) 2012-05-02

Family

ID=43334131

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1017743.4A Withdrawn GB2484901A (en) 2010-10-21 2010-10-21 Data processing unit with scalar processor, vector processor array, parity and FFT accelerator units

Country Status (1)

Country Link
GB (1) GB2484901A (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3344345B2 (en) * 1998-12-15 2002-11-11 日本電気株式会社 Shared memory type vector processing system, control method thereof, and storage medium for storing vector processing control program
US8090928B2 (en) * 2002-06-28 2012-01-03 Intellectual Ventures I Llc Methods and apparatus for processing scalar and vector instructions
US7412588B2 (en) * 2003-07-25 2008-08-12 International Business Machines Corporation Network processor system on chip with bridge coupling protocol converting multiprocessor macro core local bus to peripheral interfaces coupled system bus
US20070198815A1 (en) * 2005-08-11 2007-08-23 Coresonic Ab Programmable digital signal processor having a clustered SIMD microarchitecture including a complex short multiplier and an independent vector load unit

Also Published As

Publication number Publication date
GB2484901A (en) 2012-05-02

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)