GB1583370A - Process and circuit arrangements for controlling the regulation of electrical power supply - Google Patents

Description

(54) PROCESS AND CIRCUIT ARRANGEMENTS FOR CONTROLLING THE REGULATION OF ELECTRICAL POWER SUPPLY (71) We. CORECI Compagnie de Regulation et de Controle Industriel. A Societe Anonyme organised under the laws of France.

of 2-4. Rue Despamlet. 69008 Lyon, France.

do hereby declare the invention for wliich we prap that a patent may be granted to us. and the method by which it is to be performed. to be particularly described in and by the following statement : The present invention relates to the regulation of the power supplied to an electrical apparatus; nonnally by means of senli-conductor arrangements of the type comprising thyristors and triacs.

It is known that these completely static arrangements make it possible to some extent to determine the amount of electrical energy without the inconveniences of those which generate electric arcs. In order to achieve this, they are controlled in such a way that they are sometimes conducting and sometimes non-conducting. It is then necessary to depend on the electrical, thermal or mechanical inertia of the load for obtaining a practically regular functioning.

With alternating current, it has thus become necessary to visualise two methods of control, namely, by wave trains and by phase angle, as described below.

With control by means of wave trains, the arrangements or devices are made conductive for a first number of successive periods, and then non-conductive during a second number of such periods. The total of these two numbers of periods will hereinafter be referred to as the 'operating cycle" of this control. It is understood that. by working on the two numbers, it is possible to cause a variation in the effective power as supplied between a very low value and a maximum value corresponding to the uninterrupted supply. Tides method of regulation is very simple: it does not influence the power factor and if the opening and closing of the circuit are effected exactly with the passage of the current tinough zero, it does not cause the occurrence of undesirable harmonics or the yen'mission of harmful parasitic noises. On the other hand, the progressive nature thereof is limited in the sense that it proceeds by complete periods. that is to say, in steps. It would of course be possible theoretically to visualise the far better approximation to the perfect progressivity by extending the conduction cycle and the non-conduction times of the operating cycle over a very large number of periods, but then the duration of this cycle quickly becomes incompatible with the inertia of the load. It is not possible reasonably to envisage supplying a motor of medium power and driving a load with a low moment of inertia by supplying it by periods separated from one another by 10 seconds, which really only ensures a resolution of 1/500 for the progressive nature of the regulation on a 50 c/s supply network.

With control by means of phase angle, the half-sinusoids of certain of the periods of the operating cycle are truncated such that each period comprises a conduction time and a nonconduction time. Thus, the arrangement is only made conductive with a certain delay relatively to the passage through zero, which terminates the preceding half period. It is possible in this way to obtain a perfectly progressive regulation, but the closure of the circuit after the passage through zero causes a deformation of the sinusoid with appearance of harmonics and the generation of sometimes considerable noise.

The power factor is also reduced, and this to an increasing degree as the conduction time is smaller in relation to the half period.

The two control methods have sometimes been combined on a single installation, for example, by sometimes using one and sometimes the other. Such an arrangement is disclosed in French Patent No. 2, 049, 693.

The present invention contemplates the simultaneous use of the two methods of control by wave trains any by phase angle in such a manner that their respective disadvantages are in practice minimised.

In accordance with the invention, the progressive nature between the successive steps of a regulation controlled by wave trains is achieved by providing an intermediate regulation which is controlled by phase angle. Thus, the invention provides a process for controlling the regulation of the electric power supplied to a load as a function of an analogue signal representing the difference between the true value of a para meter of this load and a predetermined reference value, of the type in which the operation is effected by "wave trains" and by "phase angle", each as defined herein, wherein the control by wave trains is used as basis and the progressive nature between the successive steps which it comprises is assured by effecting an intermediate control by phase angle, the total modulation effected by phase angle control in each operating cycle not exceeding that of one step in the operating cycle.

In order to effect the intermediate regulation, it is possible either to act on a single period of each conduction wave train, for example, on the last; or to act on all the periods simultaneously.

Circuits which permit the aforesaid regulating procedure are also encompassed by the present invention any may be readily constructed by utilising elements which are at present available in the art.

The invention will now be described by way of example, and with reference to the accompanying drawings which illustrate two embodiments thereof, and wherein: Figure 1 represents a stepped signal used for carrying the invention into effect; Figure 2 represents an operating cycle of ten periods, in which the conduction time corresponds to five sinusoids, four of them being complete and the fifth being truncated in order to achieve the desired accuracy in the regulation; Figure 3 is a view similar to that of Figure 2, but in which the accuracy of the regulation is obtained by truncating all the sinusoids of the conduction time; Figure 4 is a graph which represents the conduction angles of the successive sinusoids when their number passes from 1 to 10 as a function of the input signal in the system according to Figure 2, in which only the last of these sinusoids is truncated; Figure 5 shows in the same way the variation in the conduction angle of all the sinusoids of the system in Figure 3, as their number passes from 1 to 10, always as a function of the input signal.

Figure 6 is a diagram represented by rectangles of a known power control module; Figure 7 represents in similar manner all the circuits which are associated with the module of Figure 6, in one embodiment of the invention, for achieving the regulation in accordance with Figures 2 and 4; Figure 8 shows in superimposed form a succession of curves which explain the operation of the diagram given in Figure 7; and Figures 9 and 10 are views similar to those of Figures 7 and 8, but corresponding to the embodiment shown in Figures 3 and 5.

As a basis, it will be assumed that the maximum length provided for the wave train, that is to say, the regulating or operating cycle, is equal to 10 periods. For this length, the successive trains are not separated by any non-conduction time and the power supplied to the load is thus itself also maximal.

It will also be assumed that the regulation of the power has to be effected in dependence on an analog signal or input signal Ve, the voltage of which can vary from 0 to 10 volts.

It will immediately be understood that, in such an example, when the input signal passes progressively from 0 to 10 volts, the wave train control causes the conduction time to pass by successive steps from 0 to 10 complete periods.

The progressive nature of such a regulation is evidently fairly poor, since it corresponds to a resolution of 1/10. In order to achieve such a control, a stepped or graduated signal S (Figure 1) is established in known manner, this signal being extended in time over 10 periods T of the alternating current, each step comprising a height of 1 volt. This signal S is permanently compared with the voltage Ve and each time that this latter crosses one stage, either while ascending or while descending, there is deduced therefrom a signal which increases or decreases by one period the length of the successive wave trains, that is to say, the duration of the conduction times (by decreasing or increasing proportionately the non-conduction times). However, differentiating from the prior art, each time there is provided one step in addition and the control is brought into action by phase angle, so that the regulation as finally obtained corresponds exactly to the voltage Ve. Thus, in Figure 1, the voltage Ve is 4.4 volts, which would correspond to 4 steps or conduction periods in a conventional control by wave trains. According to the invention, 5 periods are provided and action is taken by phase angle in order to reduce the conduction time to an extent corresponding to the difference of 0.4 volt between the level of Ve and that of the fifth step. Speaking practically, there is derived from the difference of 0.4 volt, measured in a suitable comparator, a complementary signal which acts by phase angle either on the last sinsusoid (fifth period) of the train, or on the five sinusoids or periods of the said train, so as to establish a reduction in conduction time corresponding to 0.4/10 of the maximal time or operating cycle of 10 periods, that is to say, to 0.4 period.

Figures 2 and 3 show the respective effects of the final regulation in both cases. It is seen that in both, for a voltage Ve holding between the fourth and the fifth steps, there has been provided five successive sinusoids or conduction periods T1 to T5, the remaining periods T6 to T10 corresponding to the non-conduction time.

Consequently, should one be obliged to keep to the control by wave trains, the regulation as ob tained would correspond to an input voltage of 5 volts. The error is consequently 0.6 volt. To compensate for this, according to Figure 2, action is taken by phase angle on the last sinusoid T5, that is to say, it is truncated, thereby only clos ing the circuit a certain time after the instant which would normally be the start of each of its half periods. According to Figure 3, on the contrary, action is taken in like manner on all five sinusoids.

It is understood that, in the first case, the last sinusoid T5 is very strongly truncated. The result thereof is that, as regards this sinusoid, there is an appreciable emission of noise, a fairly low power factor and the generation of relatively intense harmonics. However, all these disadvantages are distributed over the duration of the total operating cycle of 10 periods, so that their significance is found to be considerably reduced. In the second case, all the sinusoids Tl to T5 are truncated, but each of them is only truncated to a very small degree, since the error of 0.6 volt for which compensation has to be made is uniformly distributed over them, this amounting to 0.12 volt for each of them. The noises which occur thus remain small and the power factor is very little affected by an also very insignificant deformation. Likewise, the production of undesirable harmonics is very restricted. Whichever system is employed, the final result is a regulation which is extremely satisfactory from all points of view.

It will be noted that, for the very low powers (Ve = 1 volt), the two systems only comprise a single conduction sinusoid which is more or less truncated as a function of the regulation and the two systems are thus strictly identical. Starting from this point and in proportion as the power required increases, they differ from one another.

It is possible from this point of view to compare the graphs of Figures 4 and 5.

In Figure 4, which corresponds to the first system, the variations of the conduction angle for the last of the sinusoids T1 to T10, which is in action at each time, has been represented as a function of the signal Ve. For the value 4.4 volts of this signal, the train comprises five sinusoids T1 to T5. The first four sinusoids T1 to T4 are complete (see Figure 2), whereas T5 is truncated.

Considered as a function of the variation of Ve, the conduction angle of T5 passes from 00 for Ve = 4 volts to 1800 for Ve = 5 volts. It is seen that, as regards the value Ve = 4.4 volts (point A), this angle (point B) is only slightly less than 75 , which is obviously small, but only affects one sinusoid out of five and one period out of ten.

Figure 5 shows the variation in the conduction angle of all the sinusoids in action for the various values of Ve in respect of the second system. It is seen that, for the small values of this signal, it is only the sinusoid T1 which then intervenes and of which the conduction angle then varies from 00 to 1800. Then T1 and T2 come into action following one another when Ve exceeds 1 volt, their conduction angle varying from 90" to 1800. With Ve contained between 2 and 3 volts, the conduction time is extended to T1, T2 and T3 and the angle varies from 1200 to 1800, and so on. For Ve = 4.4 volts, the wave train comprises five successive sinusoids T1 to T5 (see Figure 3), as is also the case in Figure 4, but here these five sinusoids are all truncated (point A') and their conduction angle (point B') is slightly larger than 1500, this corresponding to a deformation of little significance. It may in addition be noted that in the most usual cases where, apart from certain exceptional instants, the power has to be regulated between 50% and 90% of its maximum value, the minimum conduction is held between 5/(5 + 1) = 83% and 9/(9 + 1) = 90% which corresponds to a power factor higher than 0.95.

It will also be noted as regards Figure 5: that all the straight lines according to which are aligned the segments of the diagram (which correspond to the successive variations of the conduction angle as the number of the sinusoids of the train increases) pass through the centre of the coordinated axes, as shown in respect of the segment corresponding to the zone of 4 to 5 volts; - that the low points of the diagram are situated on a curver of hyperbolic form, accepting the horizontal 1800 as asymptote.

It is appreciated that the regulating process which has just been described may be put into practice in many ways, using for this purpose various suitable circuits which are well known in the electronic art. However, there will be given hereinafter one particular embodiment which provides the advantage of making use to a maximum extent of the circuit assemblies or modules employed at the present time for the regulations which are controlled by wave trains or by phase angle.

Reference will first of all be made briefly to the type of module in general use (Figure 6). It comprises a modulator 1, which receives, either directly at 2, an analog signal Ve for the control by phase angle, or indirectly at 3 a logic signal Ve, for the control by wave train, by way of a synchronous blocking gate 4, -to which this signal is applied at 5. The modulator 1 and the gate 4 additionally receive, respectively at 6 and 7, the signal of a detector 8 which itself receives at 9 a synchronising signal and which indicates to them the instant at which the sinusoid of the supply current passes through zero. The output 10 of the modulator is applied to a circuit 11 which ensures the insulation between the preceding circuits and the subsequent circuits. The output 12 of the circuit 11 terminates at a switching circuit 13, which sends the regulating signal through two outputs 14 and 15, either to one or to the other of two thyristors 16 and 17, mounted in parallel on the conductor 18, which transports the electric power which is to be regulated. No details will given concerning the functioning of such a module, which is well known in the art.

Figure 7 shows how it is possible, with the aid of such a module, to ensure the control in accordance with the invention with the use of the first system, according to which the phase angle variation is limited to the last sinusoid of the conduction period (see Figure 2). The arrangement which is used comprises a crust suppressing circuit 19, to which the supply sinusoidal voltage is applied at 20. This circuit may include a transformer and an appropriate arrangement of Zener diodes in order to give at its output 21 or more or less trapezoidal signal of constant amplitude.

This signal is applied to a shaping circuit 22, for example a trigger circuit, which derives therefrom a rectangular signal. The output 23 of the circuit 22 brings the rectangular signal to a counter 24, for example a binary counter, the outputs 25 of which are applied to an integrator 26. This latter delivers at its output 27 a stepped signal, which is applied to one of the inputs of a differential amplifier 28, which receives the regulating analog signal Ve on its other input by way of the conductor 29 and of which the output 30 is connected to the "phase angle" input of the module of Figure 6. In the case taken by way of example of an operating cycle which extends over ten periods (see Figure 2), the binary counter 24 may be of the four-bit type (that is to say, a counter capable of counting up to the decimal number fifteen). As regards the integrator 26, this can be developed in any desired form, for example, with a digital-analog coverter. The important factor is only that the integrator and the counter return to zero at the time of each tenth rectangular pulse corning from the circuit 22 (that is to say, after the counter has arrived at the binary number 1001), all this being for the purpose of obtaining at the putput 27 a succession of steps such as that indicated at II in Figure 8. It is moreover understood that it would be possible to use a decimal counter at 24, which would thus ensure in itself the zeroising after the number 9. Finally, the differential amplifier 28 is provided with a gain equal to the number of periods of the operating cycle, i.e. 10, and in addition its output is limited to the same number of units, that is to say, to 10 volts.

The operation will be explained by reference to Figure 8. In this figure, the part I represents the sinusoidal voltage during the operating cycle of 10 periods (lOT). The part II corresponds to the stepped signal leaving 26 (Figure 7), that is to say, to the curve S of Figure 1, but on a larger scale in the horizontal direction. There is shown therein the horizontal Ve which represents a regulating voltage of 4.4 volts.

The part III corresponds to the output 30 of the differential amplifier 28. As long as the difference between the stepped voltage S and the voltage Ve is greater than 1 volt, this amplifier, with a gain equal to 10, gives its maximum of 10 volts, which it is unable to exceed (see the horizontal P1 of the part III of Figure 8) and which ensures full conduction in phase angle. Thus, the modulator 1 of Figure 1 receives the maximum voltage and no sinusoid is truncated (see part V of Figure 8, which represents the current received by the load through the conductor 12 of Figure 6). On the contrary, when the aforesaid voltage is only 0.4 volt from the fourth stage, the output voltage from 28 is consequently lowered to 0.4 x 10 = 4 volts (horizontal P2), so that the modulator 1 intervenes for accordingly truncating the last sinusoid. When the difference is reversed from the following stage, 28 no longer emits any output (or even a negative output, which is eliminated in any appropriate manner) and consequently the modulator truncates all the following sinusoids, that is to say, it suppresses them. The same functional procedure is repeated during the following operating cycles. The part V of Figure 8 clearly shows the result of the regulation. It is possible to see therein four complete successive sinusoids at N1 and a fifth very strongly truncated sinusoid at N2 (conduction angle B of Figure 4).

So as to supplement safety in operation, it is also possible to include in the diagram of Figure 7 an arrangement which positively locks the modulator 1 of Figure 6 after the duration of the wave train (that is to say, after five periods in the aforesaid example). This arrangement may comprise a comparator circuit 31 (trigger, differential amplifier, etc.) receiving the same inputs as the amplifier 28 and suitable for emitting at its output 32 a blocking signal which is applied to the control gate 4. As a modification, the signal emitted by 31 may, on the contrary, be an opening signal permitting the functioning of the modulator provided for being stopped as soon as the said signal ceases. Such an opening signal has been represented at M in part IV of Figure 8.

Figure 9 indicates how the module of Figure 6 is used when it is desired to make use of the second system according to the invention, that is to say, to achieve the progressive nature by no longer truncating only the last of the sinusoids by the wave train, but in fact all of said sinusoids.

Once again shown in this figure are the circuits 19 and 22, the counter 24, the integrator 26, and also the comparator 31, which is necessary here, although it was only optional in Figure 7.

In addition, a conduction angle corrector has been provided, which is suitable for establishing a phase angle signal common to all the sinusoids.

This corrector comprises a circuit 33 memorising the number which appears in the counter 24 when a blocking signal is applied to its correspond ing input 34 by the comparator 31 (or by the absence of output from this signal if this latter is operative for the opening and not for the blocking). The output 35 of the signal 33 is sent to a programming circuit 36 which derives therefrom a signal which it sends in its turn through its output 37 to the gain control input of an amplifier 38 (which here replaces the differential amplifier 28 of Figure 7). The input 39 of this amplifier 38 is connected to the supply conductor for the regulating voltage Ve, while its output 40 is connected in its turn to the phase angle control input 2 of the modulator 1 of Figure 6.

Figure 10 enables the operation to be understood. There is once again seen at I the succession of ten sinusoids corresponding to the operating cycle 10T chosen in the example. Also to be seen at II is the stepped curve S with the horizontal Ve corresponding to 4.4 volts in this example.

The part III represents the opening signal emitted by the comparator 31 as long as the voltage S is lower than Ve. It is identical with the part IV of Figure 8, the only difference being that it is essential here, whereas the intervention thereof was only optional in the diagram of Figure 6.

For this reason, it has also been given the reference M in Figure 10. As stated above, this signal blocks the modulator 1 after the fifth conduction period, so that the finally obtained wave train N only comprises five successive sinusoids (part V of Figure 10). Moreover, the circuit 33 has memorised five units (binary 101) at the end of this wave train or conduction time and it has sent this information to the circuit 36. This latter is programmed so as to derive therefrom the slope of the oblique segment L (Figure 5) corresponding to the regulation by phase angle in the range contained between the stages corresponding to four and five sinusoids. It sends to the amplifier 38 a gain control signal, as a consequence of which the output 40 of this amplifier applies to the input 2 of the modulator 1 of Figure 6 a signal K (Figure 10, part IV), which extends the conduction angle of all the sinusoids of the train of the following operating cycle to the value B' of Figures. The problem is thus resolved, at the expense of a delay of one operating cycle, which is of no importance in practice.

Concerning the regulation by phase angle, it is suitable to recall that the power which it permits to be obtained is not a linear function of the conduction angle. Thus, where it is a question of the first system or the second system according to the invention, which the control such as described above, the regulation which is obtained does not correspond linearly to the voltage Ve applied to the regulator.

Nevertheless, it is advisable to note the following: 1. It is frequently possible in practice to compare the regulated power with that which it is proposed to obtain, to note the difference and to derive therefrom a supplementary regulating voltage, which can be made to intervene for causing disappearance of the error in linearity.

Furthermore, Ve quite often already results from the comparison between the true value of the power and the value which is fixed for it, so that the aforesaid correction is itself effected.

2. In the system in which the last sinusoid is truncated, the error in linearity is imperceptible, as soon as the number of conduction sinusoids is slightly raised, for example, starting from four to five. It is therefore possible usually to disregard it.

3. In the system in which all the sinusoids are truncated, it is possible always to programme the circuit 34 in such a way that it allows for the non-linearity. If Figure 5 is considered, it is understood that this correction depends on two points: - the oblique segments such as L are no longer exactly rectilinear, but are deformed in sinusoidal fashion, this deformation being however so small that it can be disregarded in practice; - the segments in question, even assumed to be exactly rectilinear, no longer pass through the centre 0 of the coordinates, but in fact through points situated at increasing abscissae along the axis of the x's, with the result that the curve R in Figure 5 is found to be slightly lowered.

It is thus possible to achieve a regulation in which the power supplied to the load is a linear function of the input signal.

Moreover, it has to be understood that the foregoing description has only been given by way of example and it does not in any way limit the scope of the invention, from which there would be no departure by replacing the details of execution as described by any other equivalents.

It is understood that the number of periods per operating cycle can vary according to circumstances. It would in fact be possible to make the number equal to 16, for example, so as to assure the automatic return to zero of the four-bit binary counter 24. Furthermore, the circuits which are used may be different from those which have been described above, but which nevertheless seem to represent the embodiment which is most advantageous at the present time WHAT WE CLAIM IS: 1. A process for controlling the regulation of the electric power supplied to a load as a function of an analogue signal representing the difference between the true value of a parameter of this load and a predetermined reference value, of the type in which the operation is effected by "wave trains" and by "phase angle", each as defined herein, wherein the control by wave trains is used as basis and the progressive nature between the successive steps which it comprises is assured by effecting an intermediate control by phase angle, the total modulation effected by phase angle control in each operating cycle not exceeding that of one step in the operating cycle.

2. A process according to Claim 1, wherein the number of conduction periods of the operating cycle is anticipated so as to be found at the regulation step situated immediately above the value corresponding to the input signal, the sinusoid of only the last of these periods being truncated so as to compensate for the difference between this value and the aforesaid step.

3. A process according to Claim 2, wherein a stepped signal representative of the successive periods of the operating cycle is generated for each operating cycle and compared with the input signal, and wherein the conduction is stopped as soon as the stepped signal exceeds the input signal, while in addition, when the difference between the input signal and the stepped signal is below the amplitude of one stage of this latter, this difference is caused to act on a device capable of truncating the sinusoid which is then presented and which corresponds to the last conduction period of the operating

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (11)

**WARNING** start of CLMS field may overlap end of DESC **. by the comparator 31 as long as the voltage S is lower than Ve. It is identical with the part IV of Figure 8, the only difference being that it is essential here, whereas the intervention thereof was only optional in the diagram of Figure 6. For this reason, it has also been given the reference M in Figure 10. As stated above, this signal blocks the modulator 1 after the fifth conduction period, so that the finally obtained wave train N only comprises five successive sinusoids (part V of Figure 10). Moreover, the circuit 33 has memorised five units (binary 101) at the end of this wave train or conduction time and it has sent this information to the circuit 36. This latter is programmed so as to derive therefrom the slope of the oblique segment L (Figure 5) corresponding to the regulation by phase angle in the range contained between the stages corresponding to four and five sinusoids. It sends to the amplifier 38 a gain control signal, as a consequence of which the output 40 of this amplifier applies to the input 2 of the modulator 1 of Figure 6 a signal K (Figure 10, part IV), which extends the conduction angle of all the sinusoids of the train of the following operating cycle to the value B' of Figures. The problem is thus resolved, at the expense of a delay of one operating cycle, which is of no importance in practice. Concerning the regulation by phase angle, it is suitable to recall that the power which it permits to be obtained is not a linear function of the conduction angle. Thus, where it is a question of the first system or the second system according to the invention, which the control such as described above, the regulation which is obtained does not correspond linearly to the voltage Ve applied to the regulator. Nevertheless, it is advisable to note the following:

1. It is frequently possible in practice to compare the regulated power with that which it is proposed to obtain, to note the difference and to derive therefrom a supplementary regulating voltage, which can be made to intervene for causing disappearance of the error in linearity.

Furthermore, Ve quite often already results from the comparison between the true value of the power and the value which is fixed for it, so that the aforesaid correction is itself effected.

2. In the system in which the last sinusoid is truncated, the error in linearity is imperceptible, as soon as the number of conduction sinusoids is slightly raised, for example, starting from four to five. It is therefore possible usually to disregard it.

3. In the system in which all the sinusoids are truncated, it is possible always to programme the circuit 34 in such a way that it allows for the non-linearity. If Figure 5 is considered, it is understood that this correction depends on two points: - the oblique segments such as L are no longer exactly rectilinear, but are deformed in sinusoidal fashion, this deformation being however so small that it can be disregarded in practice; - the segments in question, even assumed to be exactly rectilinear, no longer pass through the centre 0 of the coordinates, but in fact through points situated at increasing abscissae along the axis of the x's, with the result that the curve R in Figure 5 is found to be slightly lowered.

It is thus possible to achieve a regulation in which the power supplied to the load is a linear function of the input signal.

Moreover, it has to be understood that the foregoing description has only been given by way of example and it does not in any way limit the scope of the invention, from which there would be no departure by replacing the details of execution as described by any other equivalents.

It is understood that the number of periods per operating cycle can vary according to circumstances. It would in fact be possible to make the number equal to 16, for example, so as to assure the automatic return to zero of the four-bit binary counter 24. Furthermore, the circuits which are used may be different from those which have been described above, but which nevertheless seem to represent the embodiment which is most advantageous at the present time WHAT WE CLAIM IS: 1. A process for controlling the regulation of the electric power supplied to a load as a function of an analogue signal representing the difference between the true value of a parameter of this load and a predetermined reference value, of the type in which the operation is effected by "wave trains" and by "phase angle", each as defined herein, wherein the control by wave trains is used as basis and the progressive nature between the successive steps which it comprises is assured by effecting an intermediate control by phase angle, the total modulation effected by phase angle control in each operating cycle not exceeding that of one step in the operating cycle.

2. A process according to Claim 1, wherein the number of conduction periods of the operating cycle is anticipated so as to be found at the regulation step situated immediately above the value corresponding to the input signal, the sinusoid of only the last of these periods being truncated so as to compensate for the difference between this value and the aforesaid step.

3. A process according to Claim 2, wherein a stepped signal representative of the successive periods of the operating cycle is generated for each operating cycle and compared with the input signal, and wherein the conduction is stopped as soon as the stepped signal exceeds the input signal, while in addition, when the difference between the input signal and the stepped signal is below the amplitude of one stage of this latter, this difference is caused to act on a device capable of truncating the sinusoid which is then presented and which corresponds to the last conduction period of the operating

cycle.

4. A process according to Claim 3, wherein the device designed for truncating the sinusoids is arranged in such a way that it controls the conduction angle of each of the halves of this latter and wherein, as long as it receives a signal representing more than the amplitude of one stage of the stepped signal, it allows the successive sinusoids to pass through, without truncating them.

5. A process accoriling to Claim 3 or Claim 4, wherein the device designed for truncating the sinusoids is arranged in such a way that when it does not receive a signal or receives a reversed signal, it stops the conduction, so as to make useless any other means for this effect.

6. A process according to Claim 1, characterised in that the number of conduction periods of the operating cycle is anticipated in such a way as to be found at the step situated immediately above the value corresponding to the input signal and in that the sinusoids of all these periods are truncated so as to compensate for the difference between this value and the aforesaid step.

7. A process according to Claim 6, wherein a stepped signal representative of the successive periods of the operating cycle is generated for each operating cycle and compared with the input signal, and wherein the conduction is stopped as soon as the stepped signal exceeds the input signal, while in addition the number of conduction periods is recorded and the number as thus recorded is caused to act on a preprogrammed circuit which emits a signal which is applied to a variable gain amplifier receiving the input signal, in order to regulate the gain of this amplifier during the following operating cycle, the output of this amplifier being used for truncating all the sinusoids corresponding to the conduction periods of this operating cycle.

8. A process according to Claim 7, characterised in that the pre-programmed circuit is provided in such a way that it ensures the compensation of the non-linearity between the conduction phase angle of the various periods concerned and the power which corresponds to this angle.

9. A process for controlling the regulation of the electric power supplied to a load substantially as described herein with reference to and as illustrated in Figures 2, 4, 7 and 8 of Figures 3, 5, 9 and 10 of the accompanying drawings.

10. Circuit arrangements established for carrying into effect the process according to any of the preceding Claims.

11. Circuit arrangements according to Claim 10 and substantially as herein described with reference to the accompanying drawings.