GB1573894A

GB1573894A - Ignition system for internal combustion engines

Info

Publication number: GB1573894A
Application number: GB16616/78A
Authority: GB
Original assignee: Robert Bosch GmbH
Current assignee: Robert Bosch GmbH
Priority date: 1977-10-29
Filing date: 1978-04-26
Publication date: 1980-08-28
Also published as: DE2748663A1; DE2748663C2

Description

(54) AN IGNITION SYSTEM FOR INTERNAL COMBUSTION ENGINES (71) We, ROBERT BOSCH GmbH, a German company of 50, Postfach, Stuttgart, Germany, do hereby declare the invention for which we pray that a patent may be granted to us, and the method by which it is to be performed to be particularly described in and by the following statement:- The present invention relates to an ignition system for an internal combustion engine.

Such an ignition system is already known from German OS 2 539 113 which has an ignition computer. During the calculation of the ignition instant a problem exists that reference must be made back to the previous angular information. If, after the generator information, an acceleration operation, for example, takes place, then the ignition instant calculated therefrom takes place too late. It is precisely during acceleration operations that a false ignition instant is of particular disadvantage.

The present invention provides an ignition system for an internal combustion engine comprising means for generating timing signals indicative of the time taken for the engine to turn through a predetermined angle and of the time taken for the engine to turn through said angle at a later period in time, an ignition computer, the output of which is arranged to control an electrical switch in the primary current circuit for an ignition coil in response to said timing signals, means for comparing said timing signals and deriving therefrom a difference signal indicative of non-steady state conditions, and means responsive to said comparing means for controlling the output from the computer to alter a subsequent switching instant of the electrical switch in the presence of nonsteady state conditions.

In use, the ignition system has the advantage that the error occurring especially during acceleration operation, is reduced or compensated for the ignition angle calculation. Thereby, the ignition instant corresponds closely to the given ignition characteristic curve even during non-steady state conditions.

It is of particular advantage, for triggering a switching operation of an electrical switch in the primary current circuit of the ignition coil to provide a logic OR-gate through which, upon the advance of the generator edge due to an acceleration to a point in front of the switching instant determined by the ignition computer, the switching operation can be triggered by the generator edge.

In order that the present invention be more readily understood embodiments thereof will now be described by way of example with reference to the accompanying drawings, in which: Figure 1 shows a circuit arrangement of a first embodiment; Figure 2 is a signal diagram for explaining the first embodiment illustrated in Figure 1; Figure 3 is a further signal diagram for explaining the method of operation of a modified version of the embodiment illustrated in Figure 1; Figure 4 is a circuit arrangement of a second embodiment; Figure 5 is a signal diagram for explaining the second embodiment illustrated in Figure 4; Figure 6 is a detailed circuit for the production of generator edge signals; and Figure 7 is a signal diagram for explaining the circuit illustrated in Figure 6.

In the first embodiment illustrated in Figure 1, a generator arrangement 10 coupled to the crankshaft of an internal combustion engine is connected to the input to a pulse shaping stage 11 preferably formed as a Schmitt-Trigger. Moreover, a disc 100 with angular segments, which is coupled to the crankshaft, passes in front of a receiver 101. The disc 100 has three angular segments 102 each of which includes an angle of 60 . This arrangement serves for controlling a six cylinder combustion engine. A correspondingly varied number of angular segments is required for other numbers of cylinders.

Instead of a continuous angular segment, reference marks can also occur each of which defines the beginning and the end of such a segment. Arrangements such as inductive generators, mechanical contact breakers, Hall-generators, optical generators or Wiegand-generators are possible for the generator arrangement 10.

The output from the pulse shaping stage I 1 is connected, through a further pulse shaping stage 12. to two inputs of a known ignition computer 13 which, for example, is described in the state of the art set forth above. On the occurrence of front or rear edges of the output signals from the pulse shaping stage 11, signals are generated at the two outputs VF and RF. An embodiment of such a pulse shaping stage 12 is described in detail in Figures 6 and 7.

By using a generator arrangement which only responds to segment edges, such as for example an inductive system, the pulse shaping stages 11 and 12 can, for example, be formed as two Schmitt-triggers each of which is connected to the receiver 101 through oppositely poled diodes.

A terminal 25 connected to the output RF from the pulse shaping stage 12 is connected through an OR-gate 15 to the input to an AND-gate 16 the output from which is connected through a further OR-gate 17 to a terminal 18. The output from the OR-gate 15 is connected to a further input to the said OR-gate 15 through a retarding device 19. This - retarding device 19 comprises a series circuit of a capacitor 190 and a resistor 191 connected between the output from the OR-gate 15 and earth, wherein the interconnecting point of these two components 190, 191 is connected to the further input to the OR-gate 15. An output ZP from the ignition computer is connected to a terminal 20 which is connected in turn to a third input to the ORgate 15.Binary outputs Zo from the ignition computer 13 are connected to a terminal arrangement 21 and binary outputs Zz from the ignition computer 13 are connected to a terminal arrangement 22, the terminal arrangements being connected to the inputs to a digital comparator 23 such as, for example, the Motorola (Registered Trade Mark) component My 14585. The digital comparator 23 produces outputs when the binary inputs Zo and Zz are equal or when Zz is less than Zo. The outputs are connected to the inputs to an OR-gate 24, the output from which is connected to a further input to the AND-gate 16.

The terminal 25 connected to the output RF from the pulse shaping stage 12 is also connected to the resetting input R of a flipflop 26 as well as to an input to an ANDgate 27. A terminal 14 connected to the VF output of the stage 12 is connected to the setting input S of the flip-flop 26 through an AND-gate 28. The digital comparator 23 also produces an output when Zz is greater than Zo and this output is connected to a further input to the AND-gate 28. The output from the flip-flop 26 is connected through a terminal 29 to the blocking input CE (clock enable) of a digital counter 30 the clock input C of which is connected to a terminal 31 in communication with a clock generator. Preferably, the clock generator included in the ignition computer 13 is used for the said clock generator 30.The numerical outputs from the digital counter 30 and the terminal arrangement 21 are connected to the inputs to a further digital comparator 32 where they are compared, and the output from the comparator 32 is connected to a further input to the ANDgate 27. The output from the AND-gate 27 is connected to the setting input PE (preset enable) of a further digital counter 33 the clock input C to which is likewise in communication with the terminal 31.

Moreover, the terminal arrangement 21 is connected to the numerical inputs P (preset) to the counter 33. The output from the AND-gate 28 is connected to the setting input S to a flip-flop 34 the output from which is connected to the blocking input CE to the counter 33. The numerical outputs from the counter 33 hand and the terminal arrangement 22 are connected respectively to numerical inputs to a further digital comparator 35 where they are compared, and the output from the comparator 35 is connected to a further input to the OR-gate 17. The output from the OR-gate 17 is connected to the terminal 18 which is connected to the resetting inputs R to the flip-flop 34 and the counters 33 and 30.

The terminal 18 is also connected to the resetting input to a flip-flop 36 the output from which is connected to the base of a power transistor 37, preferably through driver stages not illustrated in the drawing.

The collector of the power transistor 37 is not only connected through the primary winding of an ignition coil 38 to a terminal 39 connected to the positive pole of a supply voltage source, but also through the secondary winding of the said ignition coil 38 to a spark gap 40. The emitter of the power transistor 37 and the second electrode of the spark gap 40 are connected to earth. In an internal combustion engine, the spark gap 40 is usually in the form of a sparking plug. A high-tension distributor can be provided in known manner when a number of sparking plugs are required.

The method of operation of the embodiment illustrated in Figure 1 will become apparent from the following description which refers to Figure 2. The generator signals converted by the pulse shaping stage 11 into square-wave signals Ul 1 each extend, in the present case, over an angle of 60". The gaps between the signals likewise include an angle of 60". Through the second pulse shaping stage 12, short signals U14 at the instant when the forward edges of the signal sequence Ul 1 occur, are generated at the terminal 14 and at the terminal 25, signals U25, which occur at the instant of the rear edges of the signal sequence Us 1. The ignition computer 13 is controlled by these converted generator signals in known fashion.Therein, the length of the generator signals Ul 1 is counted out by clock pulses from a clock generator and the derived value Zo is stored until the next cycle. Moreover, a digital numerical value Zz is produced and clock pulses counted in a counter until the said numerical value Zz is reached. At this instant, the ignition computer delivers a signal ZP by means of which the ignition is triggered. The numerical value Zz is likewise stored until the next cycle and if necessary corrected when vehicle parameters for influencing the ignition instant have to be varied. If the numerical value Zz is greater than the numerical value Zo, then the ignition instant is located in time after a generator rear edge indicated by pulse U25.The output from the comparator 23 connected to the AND-gate 28 produces a signal and the two other inputs each produce 0-signals through which the AND-gate 16 remains blocked.

On the other hand, if the numerical value Zz is smaller than or equal to the numerical value Zo, then the ignition instant is located in advance of a generator ear edge indicated by pulse U25, the AND-gate 28 is blocked and the AND-gate 16 becomes conductive in respect of output signals from the ORgate 15.

It will now be assumed that Zz is greater than Zo. Thus, the AND-gate 16 is blocked and the AND-gate 28 becomes conductive for signals U14. The flip-flop 26 is set by such a signal U14 alnd thus released by the input CE of the counting procedure for clock pulses in the counter 30. These clock pulses are counted upwards in the counter 30 until the flip-flop 26 is reset by a signal U25 and the counter 30 is blocked once again thereby. The numerical value Zo' which has been reached, is compared in the digital comparator 32 with the numerical value Zo from the previous cycle. If the numerical value Zo' is greater than or equal to the numerical value Zo, then the output from the digital comparator 32 changes from a I-signal to a 0-signal. This means that no acceleration procedure is taking place.

The AND-gate 27 is blocked for the following signal U25. The setting input PE to the counter 33 cannot be actuated. Also, the flip-flop 34 is set every time by signals U14. A counting procedure is thus released in the counter 33 and an upwards counting procedure begins. This upwards counting procedure lasts until the numerical value Zz applied to the comparator 35 has been reached. At this instant, the comparator 35 delivers an output signal U35 through which the flip-flop 36 is reset through the OR-gate 17. The transistor 37 is blocked and an ignition spark is generated in known manner across the spark gap 40. The start of the closing time of the transistor 37 is achieved by setting of the flip-flop 36 through the terminal 41. This terminal 41 receives a corresponding signal from the ignition computer 13. In the simplest of cases, this signal can also be the signal U14.

If an acceleration operation begins, as is illustrated in the third cycle, then the numerical value Zo can no longer be achieved by the counter 30 as a result of the shortened time, that is to say Zo' is smaller than Zo. A 0-signal is no longer generated at the output from the comparator 32 and thus the setting input PE to the counter 33 can be actuated by the following signal U25.

The numerical condition Zx existing at this instant, rises rapidly to the numerical condition Zo applied to the numerical inputs P. Thus, at the instant when the signal U25 occurs, the same numerical value exists in the counter 33 as in the previous cycle.

Thus, the dynamic error is reduced since the remaining counting until the numerical condition Zz is achieved, then requires a shorter time span and the ignition instant is advanced thereby.

It will now be assumed that Zz is smaller than or equal to Zo whereby the AND-gate 28 remains blocked. The flip-flops 26, 34 cannot be set whereupon no counting procedures are triggered in the counters 30, 33. The ignition is triggered by the ignition computer 13 through the terminal 20, the OR-gate 15, the AND-gate 16 and the ORgate 17. Now if a deceleration commences, then it can happen that the generator rear edge, that is to say the signal U25, occurs in advance of the signal ZP. In this case, the ignition is triggered by the said signal U25 through the OR-gate 15. Thus, the ignition instant is likewise advanced by the acceleration in accordance with the new demands.Since with each cycle, two successive signals ZP and U25 occur at the OR-gate 15, the retarding device 19 is provided for preventing a duplicate signal, and through which a signal is delivered to the input to the OR-gate 15 as from the occurrence of the first signal until the second signal has also arrived. The retarding time of the retarding device 19 is so adjusted by calculating the values of the components 190, 191 that the greatest possible period between the two signals produces the retarding time. This is the time until the capacitor 190 has been charged through the resistor 191 to such an extent that the voltage across the resistor 191 falls below the switching threshold of the OR-gate 15.

The signal diagram illustrated in Figure 3 serves to explain an embodiment slightly modified with respect to Figure 1, for the dynamic influencing of the beginning of the closing time of the transistor 37, as opposed to Figure 2, where the end of the closing time is influenced dynamically. Instead of the three signals ZP, Zz and Zo previously delivered by the ignition computer 13, the signals SP (start of the closing time), Zs (numerical condition at which the start of the closing time is triggered) and 2t (numerical condition which is produced by counting the gaps between the pulses of the signal sequence Ul l) must now be provided.

These signals are given in brackets in the ignition computer 13 of Fig. 1. The connections to the terminals 14 and 25 must be interchanged and the output from the OR-gate 17 must be connected to the terminal 41 instead of to the terminal 18.

The illustrated signals and signal sequences, are well as counting sequences, proceed in the manner already described with reference to Fig. 2. The flip-flop 36 is set through the terminal 41 by the output signal from the comparator 35 or from the ANDgate 16, whereupon the transistor 37 becomes conductive and a storage of magnetic energy in the ignition coil 38 can begin. The resetting signal for the flip-flop 36 through which the transistor 37 is blocked and with it the ignition is triggered, can either be generated by the ignition computer or, in the simplest case, by a timing element which is triggered by an output signal from the OR-gate 17. Thus, a constant closing time is oroduced.

A dynamic correction of the opening time of the electrical switch 37 takes place with this method. Since the opening time control requires a smaller time lead than the ignition angle control, a smaller dynamic error is produced in respect of the instant of switching-in of the ignition coil.

Instead of a comparison in time of the duration of a previous and a subsequent generator signal, a comparison can also take place, for example between a signal gap and a generator signal, insofar as they are equally large. Also, with unequal angles, this comparison can take place in accordance with a corresponding angular compensation.

If, in an ignition system, the conditions Zz is greater than Zo or Zz is smaller than Zo exist permanently with the exception of stronger acceleration operations, then an ignition triggering method-either by the AND-gate 28 or by the AND-gate 16-can be sufficient and the components associated with the other methods can be omitted.

Furthermore, the second embodiment illustrated in Figure 4, requires the components 10 to 13 but only the terminals attached thereto are illustrated. Moreover, the terminal 14 is connected to the setting input to a flip-flop 50 and to the setting input to the flip-flop 34 as well as to the setting input PE to the counter 33. The terminal 25 is connected to the resetting input R to the flip-flop 50. The output from the flip-flop 50 is connected to the counting direction input U/D (up/down) to a digital counter 51 the resetting input R of which is connected to the terminal 14 and the clock input C of which is connected to the terminal 31. The numerical outputs from the counter 51 are connected to a digital multiplying stage 52 for multiplying the applied numerical value by a numerical value K likewise applied to the digital multiplying stage 52.The outputs from the -multiplying stage 52 are connected to the numerical inputs P to the counter 33. The other circuitry for the counter 33 in combination with the components 33 and 35, correspond to the first embodiment.

The method of operation of the second embodiment illustrated in Fig. 4 will be explained in the following with the aid of the signal diagram illustrated in Figure 5. Since the flip-flop 50 is set by signals U14 and reset by signal U25 then an output signal sequence U50 corresponds to the signal sequence U11 and the pulse shaper 12 can thus be omitted, the signals from the pulse shaper 11 being used directly. If a signal U50 is present, then the counter 51 is switched to forwards counting and the clock frequency applied to the terminal 31 is counted upwards for the duration of the signal U50.

At the end of a signal U50, the counting direction input is switched over and a downwards counting operation takes place.

Since the angle of the segments of the angular disc segments 100 are identical to the segment spacing, a duty ratio for the signal sequence U50 of 1 exists during steady operation so that at the beginning of a new signal U50 the counting condition of the counter 51 again stands at its lowest value. The output numerical values from the counter 51 are multiplied in the multiplying stage 52 by a correction factor K which may be produced empirically from parameters of the system, such as for example, the width of the generator segments or the counting instants of the counters. As accurate as possible an approximation to theoretically produced dynamic families of correction curves will be obtained bv means of the said correction factor.An acceleration operation is illustrated in the second cycle of the diagram, so that at the beginning of the third signal U50 the counting condition 51 is incomparably zero. Due to the signal U14 occurring at this instant, the said numerical value Zy is transmitted, to the counter 33 as a numerical value Zy.K and is used to set the two flip-flops 34, 50. Then, from the received numerical value Zy.K, the counter 33 counts upwards at the clock frequency until the numerical value Zz is reached and an ignition triggering results.

The upwards/downwards counting procedure in the counter 51 can also be controlled by other successively timed intervals. For example, a sub-divided generator segment can be used for this purpose the first half-segment of which determines the upwards counting procedure and the second half-segment of which determines the downwards counting procedure.

Also, this method can not only be utilized for the dynamic correction of the ignition instant but also for the dynamic correction of the beginning of the closing time.

The arrangement illustrated in Figure 6 shows a circuit arrangement for the pulse shaping stage 12 for generating the edge signals U14 and U25 from the signal sequence Ul 1. The input to the pulse shaping stage 12 is connected to the input to a first D-flip-flop 120. One output from the D-flip-flop 120 is connected to the input to a second D-flip-flop 121 the output from which is once again connected to the terminal 25 through an AND-gate 122. The complementary output from the first D-flipflop 120 is connected to a further input to the AND-gate 122. The complementary output from the second D-flip-flop 121 is connected to the terminal 14 through a further AND-gate 123. The input to the second D-flip-flop 121 is connected to a further input to the AND-gate 123.A clock frequency is supplied to the clock inputs to the two D-flip-flops 120, 121 through the terminal 31.

In the signal diagram illustrated in Fig. 7 for explaining the circuit illustrated in Fig.

6, the clock frequency is illustrated as a signal sequence U31. A signal Ull is synchronised by the first D-flip-flop 120, that is to say at the beginning of the next clock signal, the signal U11 is received in the flip-flop 120 or is extinguished once again at the end of the signal Ull. This synchronised signal U120 is supplied to the second flip-flop 121, displaced therein by one cycle and then appears as a signal U21 at one input to the AND-gate 122. By combining the two signals U120 and U121 with their complementary signals in the AND-gates 122, 123, the signals U14 and U25 are generated as edge signals in an easily understandable manner.

WHAT WE CLAIM IS: 1. An ignition system for an internal combustion engine comprising means for generating timing signals indicative of the time taken for the engine to turn through a predetermined angle and of the time taken for the engine to turn through said angle at a later period in time, an ignition computer, the output of which is arranged to control an electrical switch in the primary current circuit of an ignition coil in response to said timing signals, means for comparing said timing signals and deriving therefrom a difference signal indicative of non-steady state conditions, and means responsive to said comparing means for controlling the output from the computer to alter a subsequent switching instant of the electrical switch in the presence of nonsteady state conditions.

2. An ignition system according to claim 1, wherein said comparing means comprises a clock generator and counting means for counting said clock signals during said timing signals.

3. An ignition system according to claim 2, wherein said counting means comprises a digital counter arranged to count in a first counting direction during one of said timing signals and in a second counting direction during the other of said timing signals.

4. An ignition system according to claim 1 or 2, wherein the comparing means comprises a comparator.

5. An ignition system according to any one of the preceding claims, wherein said output controlling means comprises a digital counter for counting a clock frequency, and a decoding stage connected in series after the counter, the decoding value of the stage being established by the ignition computer and on reaching the said value a switching procedure of the electrical switch can be triggered, a correcting jump in counting being triggered during the counting procedure by the presence of the difference signal.

6. An ignition system according to claim 5, wherein the triggering of the counting jump is caused by a generator edge.

7. An ignition system according to claim 6, wherein, due to the generator~ edge triggering the counting jump, the counter is set to the value which was present at the instant of the occurrence of the corresponding generator edge of the previous cycle.

8. An ignition system according to claim 3 or to claim 5 or 6 when dependent on claim 3, wherein the difference value produced by

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **. produced dynamic families of correction curves will be obtained bv means of the said correction factor. An acceleration operation is illustrated in the second cycle of the diagram, so that at the beginning of the third signal U50 the counting condition 51 is incomparably zero. Due to the signal U14 occurring at this instant, the said numerical value Zy is transmitted, to the counter 33 as a numerical value Zy.K and is used to set the two flip-flops 34, 50. Then, from the received numerical value Zy.K, the counter 33 counts upwards at the clock frequency until the numerical value Zz is reached and an ignition triggering results. The upwards/downwards counting procedure in the counter 51 can also be controlled by other successively timed intervals. For example, a sub-divided generator segment can be used for this purpose the first half-segment of which determines the upwards counting procedure and the second half-segment of which determines the downwards counting procedure. Also, this method can not only be utilized for the dynamic correction of the ignition instant but also for the dynamic correction of the beginning of the closing time. The arrangement illustrated in Figure 6 shows a circuit arrangement for the pulse shaping stage 12 for generating the edge signals U14 and U25 from the signal sequence Ul 1. The input to the pulse shaping stage 12 is connected to the input to a first D-flip-flop 120. One output from the D-flip-flop 120 is connected to the input to a second D-flip-flop 121 the output from which is once again connected to the terminal 25 through an AND-gate 122. The complementary output from the first D-flipflop 120 is connected to a further input to the AND-gate 122. The complementary output from the second D-flip-flop 121 is connected to the terminal 14 through a further AND-gate 123. The input to the second D-flip-flop 121 is connected to a further input to the AND-gate 123.A clock frequency is supplied to the clock inputs to the two D-flip-flops 120, 121 through the terminal 31. In the signal diagram illustrated in Fig. 7 for explaining the circuit illustrated in Fig. 6, the clock frequency is illustrated as a signal sequence U31. A signal Ull is synchronised by the first D-flip-flop 120, that is to say at the beginning of the next clock signal, the signal U11 is received in the flip-flop 120 or is extinguished once again at the end of the signal Ull. This synchronised signal U120 is supplied to the second flip-flop 121, displaced therein by one cycle and then appears as a signal U21 at one input to the AND-gate 122. By combining the two signals U120 and U121 with their complementary signals in the AND-gates 122, 123, the signals U14 and U25 are generated as edge signals in an easily understandable manner. WHAT WE CLAIM IS:

1. An ignition system for an internal combustion engine comprising means for generating timing signals indicative of the time taken for the engine to turn through a predetermined angle and of the time taken for the engine to turn through said angle at a later period in time, an ignition computer, the output of which is arranged to control an electrical switch in the primary current circuit of an ignition coil in response to said timing signals, means for comparing said timing signals and deriving therefrom a difference signal indicative of non-steady state conditions, and means responsive to said comparing means for controlling the output from the computer to alter a subsequent switching instant of the electrical switch in the presence of nonsteady state conditions.

upwards/downwards counting represents the counting jump.

9. An ignition system according to claim 3 or to claim 5 or 6 when dependent on claim 3, wherein the difference value produced by upwards/downwards counting multiplied by a correction factor represents the counting jump.

10. An ignition system according to any one of the preceding claims, and comprising a logic OR-gate through which the switch can be triggered by one of the timing signals or the controlled output from the computer, which ever is the earlier.

11. An ignition system according to claim 10, wherein a retarding device is provided for maintaining the signal determining the actual instant throughout a period in which the later signal falls.

12. An ignition system according to claim 10 or 11, wherein a comparison device is provided for sensing the sequence in time of the occurrence of a generator edge of the previous cycle as well as the ignition instant established by the computer, and that the ignition triggering can be controlled by the comparison device in accordance with the said sequence in time or can be controlled by said logic OR-gate.

13. An ignition system according to claim 12, wherein the comparison device comprises a digital comparator for comparing the numerical value by which the switching procedure for the electrical switch can be advanced by the ignition computer, with the numerical value which exists on reaching the generator edge, and two gating stages . are arranged to be controlled in push-pull by comparator output signals.

14. An ignition system according to any one of the preceding claims, wherein the displaceable switching instant of the electrical switch is the opening of the switch.

15. An ignition system according to any one of claims 1 to 13, wherein the displaceable switching instant of the electrical switch is the closing of the switch which triggers the beginning of primary current flow in the coil.

16. An ignition system substantially as hereinbefore described with reference to the accompanying drawings.