GB1570379A

GB1570379A - Printer synchronisation

Info

Publication number: GB1570379A
Application number: GB16052/78A
Authority: GB
Original assignee: Siemens AG
Current assignee: Siemens AG
Priority date: 1977-05-11
Filing date: 1978-04-24
Publication date: 1980-07-02
Also published as: IT7822958A0; DE2721271A1; DE2721271B2; IT1095744B; JPS53139928A; DE2721271C3

Description

(54) PRINTER SYNCHRONISATION (71) We, SIEMENS AKTIENGESELLSCHAFT, a German Company, of Berlin and Munich, Federal Republic of Germany, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: The invention relates to printers and is particularly concerned with means for synchronising type carriers in printers where the type carrier is set by a stepping motor advanced by means of stepping pulses.

German Auslegeschrift 24 42 688 discloses an arrangement for synchronising a disc-shaped type carrier in printers, wherein the type carrier is set with the aid of a stepping motor. The arrangement contains a stepping motor control unit which is provided with a ring counter at the outputs of which drive pulses for the stepping motor are emitted. The ring counter is advanced by stepping pulses. The arrangement contains a comparator device which compares the binary values of the output pulses with binary values assigned to a specific character. In the event of identity, the comparator device emits an output pulse. The type carrier is provided with a scan sector which extends over a plurality of print characters which includes the specific character (for example the letter "E").When a scanning pulse produced by means of a scanning element due to the scanning of the scan sector occurs, and at the same time the comparator device produces the output pulse, the arrangement emits a synchronising signal. This synchronising signal is used to synchronise the position of the type carrier with a binary counter indicating the position of the type carrier.

German Auslegeschrift 21 56 093 discloses a code-controlled printer, wherein the instantaneous position of the type carrier is caused to conform with the count of a binary counter arranged in a control unit of the printer in that a pulse train disc connected to the type carrier is provided with a synchronising mark which is assigned to a frequently occurring, predetermined character, for example the letter "E". Independently of other settings, the binary counter is set to the code character assigned to this predetermined character, by means of a synchronising signal, as soon as the synchronising mark is recognised by an associated scanning element. Thus in this known printer, synchronisation is carried out by the type carrier.In various situations, however, it is expedient not to synchronise the binary counter to the type carrier, but to synchronise the type carrier to the binary counter.

Therefore the aim of the invention is to provide a synchronisation arrangement wherein the synchronised position of the type carrier is automatically set to the position required by the control unit.

In accordance with the present invention, there is provided a printer comprising a type carrier driven by a stepping motor, a control unit for supplying stepping pulses to the stepping motor and arranged, in operation, to produce a triggering signal whenever the type carrier is required to be in a selected position, means arranged, in operation, to produce a synchronisation signal whenever the type carrier assumes said selected position, and synchronising means for synchronising the type carrier to the control unit, in which the synchronising means includes a pulse generator operable to supply additional stepping pulses to the motor and includes control means arranged to initiate operation of the pulse generator whenever a triggering signal is received in the absence of a synchronisa tion signal, and to terminate operation of the pulse generator when a synchronisation signal is received.

Thus no pulse train disc for the production of timing pulses for advancing the control unit (e.g. a binary counter therein) is required on the type carrier, as it is the binary counter which determines the position of the type carrier and not, vice versa, the type carrier which determines the position of the binary counter. The circuit arrangement automatically conducts a hunting sequence into the synchronising position whenever control unit supplies a triggering signal (e.g. when the binary counter contains the binary combination assigned to the synchronising position) and the synchronisation signal is not present.

Preferably, the synchronising means includes a flip-flop which is set by the triggering signal when the synchronisation signal is not present, which is reset following the occurrence of the synchronisation signal, and which, when set, provides at its output a control signal which enables the pulse generator.

In order to operate the stepping motor in such manner that it operates as soon as possible with a reasonably constant load angle, and thus a clearly defined coordination exists between the stepping pulses and the position of the type carrier, it is preferable for the pulse generator to contain a store which stores binary values which are assigned to a start programme for the stepping motor and which are read out under the control of timing pulses, and for the pulse generator to contain a gate by which the read-out binary values gate the timing pulses to produce said additional stepping pulses at the output of the gate.

The store may conveniently be a shift register.

In order to prevent termination by the synchronisation signal of operation of the pulse generator during the start phase of the stepping motor, there is preferably provided time delay means arranged in operation to prevent termination by the synchronisation signal of operation of the pulse generator until a predetermined number of said additional stepping pulses have been supplied to the stepping motor.

In order to terminate the synchronising process when the synchronising position has been reached, in a preferred embodiment there is provided a logic gate via which the synchronisation signal is fed to produce a resetting signal which terminates the synchronisation process.

In order to reduce the risk of retriggering of the synchronising process due to oscillation of the type carrier at the end of synchronisation process and an associated short interruption in the synchronisation signal, preferably the synchronising means further includes further time delay means which are supplied with the resetting signal and produce a signal which prevents the setting of the flip-flop for a predetermined length of time following the occurrence of the resetting signal.

In the following an exemplary embodiment of the invention will be described with reference to the accompanying drawings in which: Figure 1 is a block circuit diagram of part of a printer according to the invention; Figure 2 is a circuit diagram of the synchronising means of the printer of figure 1; and Figure 3 shows time diagrams of signals at various points in the synchronising means.

The disc-shaped type carrier TT illustrated in figure 1 is set via a reduction transmission GT by a stepping motor SM having three windings. The stepping motor SM is controlled with the aid of a stepping motor control unit SST of which only a ring counter has been represented. The arrangement is controlled by a printer control unit (not shown) which provides stepping pulses ST1 for normal operation of the printer and also includes a binary register (usually a counter) which, at any given time, contains a code indicating the character which is to be printed. Stepping pulses ST and a signal VOR for selecting forward or reverse movement of the stepping motor SM are fed to the input of the stepping motor control unit. This signal VOR can be produced, for example, in the manner described in the German Offenlegungsschrift 21 54 899.The ring counter RZ is stepped on in accordance with the stepping pulses ST. The count of the ring counter represents the stepping position of the stepping motor SM in the form of a three-digit binary combination A,B,C.

With each stepping pulse ST, the stepping motor SM is rotated by an angle of 30C which, taking into consideration the transmission GT, results in a rotation of the type carrier TT by one graduation.

Each of these stepping positions corresponds to a specific binary combination A,B,C. The control of a stepping motor SM in accordance with these principles is known per se and does not constitute the subject of the invention. Here it will be assumed that the binary combination 010 is assigned to a position of the stepping motor SM which corresponds to the print-out position of the character "E" on the type carrier TT.

The arrangement includes a sensor comprising a comparator device VE which checks the count of the ring counter RZ in the stepping motor control unit SST for the binary combination 010. On the type carrier TT is arranged a scan sector AS which extends over a plurality of type arms bearing the types or characters. The sensor further includes a scanning element AB for scanning the scan sector AS. The output of the scanning element AB and the output of the comparator device VE are connected to a AND-gate G1, at the output of which a synchronisation signal S3 is fed to a synchronising stage SS.

As the character "E" occurs most frequently in an English text, the synchronising position is assigned to this character.

When the binary combination 010 is present at the input of the comparator device VE, the said comparator device emits a signal D to the AND-gate G1. The scan sector AS extends over a series of type arms of the type character, the type arm bearing the character "E" being situated in the centre. When the scan sector AS is recognised by the scanning element AB, the latter emits the signal E to the ANDgate G1. Thus the synchronisation signal S3, which indicates that the synchronising position has been recognised, is emitted from the output of the AND-gate G1.

The stepping pulses ST are emitted via a AND-gate G3 from the output of a ORgate G2. An input of the OR-gate G2 is fed with the stepping pulses ST1 from the printer control unit. The second input is fed with additional stepping pulses ST2 which are produced in the synchronising stage SS in order to set the type carrier TT at the synchronising position whenever necessary. The synchronising stage SS is fed with a triggering signal S1 (which is represented in the drawing as being produced by a switch) on the occurence of which a synchronising process is triggered when the synchronisation signal S3 is not present.The triggering signal S1 is produced in the printer control unit whenever the printer is initially switched on or whenever the synchronising position is recognised in the binary counter assigned to the position of the type carrier IT. The synchronising stage SS is also fed with a signal S2 which is likewise shown as being produced, with the aid of a switch and is produced whenever the control unit of the printer recognises that the next required position of the type carrier IT is the synchronising position. If, in this case, the type carrier IT already occupies the synchronising position, the synchronising stage SS produces a blocking signal SP which blocks the stepping pulses ST with the aid of the AND-gate G3 in order to prevent movement of the type carrier IT.

The synchronising stage SS illustrated in figure 2 contains a flip-flop FF which is set each time a synchronising process is triggered. At its output, the p-flop FF feeds a control signal S5 to a pulse generator TG which produces the additional stepping pulses ST2 for the synchronisation of the type carrier IT. The pulse generator TG contains an oscillator OS which produces timing pulses LT for producing the stepping pulses ST2. The pulse generator TG also contains a shift register SR1 which stores a start programme for the acceleration of the stepping motor SM.The synchronising stage SS also contains a delay element in the form of a further shift register SR2 which prevents the synchronisation signal S3 being registered during the start phase of the stepping motor SM.

In order to prevent a new synchronising process being triggered due to oscillation of the type carrier IT at the end of the synchronising process and an associated brief disappearance of the synchronisation signal S3, the synchronising stage SS also contains a time element ZG, at the output of which a signal AV is produced which temporarily prevents a new setting of the flip-flop FF following each synchronising process.

Further details of the synchronising stage SS will be described together with the time diagrams, illustrated in figure 3, of signals. Figure 3 shows time diagrams of signals as occur at various points during the operation of the stage SS. The time t is plotted in the abscissa direction and the instantaneous values of the signals are represented in the ordinate direction. As all the signals are binary signals they assume only the binary values designated 0 and 1.

It will firstly be assumed that the type carrier does not yet occupy the synchronising position and the synchronisation signal S3 is not yet present. It will further be assumed that the signal AV is also not present. At the time tl the triggering signal S1 changes its binary value from 1 to 0 for example following the connection of the printer or following the recognition of the synchronising position in the binary counter of the printer. Thus a signal S4 changes its binary value from 0 to 1 at the output of a NOR-gate N1. The synchronisation signal S3 is inverted by an inverter N2 and fed via a delay element Z1. As S3 is zero, the signal fed from the element Z1 to the data D) input of the flip-flop FF has the binary value 1.At the time tl the rising flank of the signal S4 sets the flipflop FF. At its output, the flip-flop FF feeds the control signal S5 to the pulse generator by which the latter is enabled.

The control signal S5 is fed to a first input of a AND-gate U1 at the second input of which the timing pulses LT are present. At its output, the AND-gate U1 feeds signals on the one hand to the clock pulse input of the shift register SR1 and on the other hand, via a time delay element Z2, to an input of a AND-gate U2. Binary values assigned to the start programme of the stepping motor SM are stored in the shift register SR1. The start programme determines the intervals of time between the stepping pulses ST2. The shift register SR1 has for example eight stages and in its reset position, which is governed by a resetting signal RS, it stores the binary values 01100000. The stored binary values are represented by signals S6 at the serial output of the shift register SR1. The signals S6 are fed to the second input of the AND-gate U2.The AND-gate U2 emits stepping pulses ST2 from its output only when the signal S6 has the binary value 1.

The delay time of the time element Z2 is contrived to be such that propagation delays in the shift register SR1 are compensated for.

In the rest position the signal S6 has the binary value 0. Not until the occurrence of the fifth timing pulse LT after the time tl, does the signal S6 assmume the binary value 1 at the time t2 as the contents of the shift register SR1 is displaced by one stage with each timing pulse LT. A signal having the binary value 1 is present at the serial input of the shift register SR1, so that the binary value 1 is in each case input into the first stage and displaced by one stage together with the remainder of the contents of the shift register SR1. Following the time t2 the AND-gate U2 consecutively passes two pulses Lt, as stepping pulses ST2, to the stepping motor control unit SST. At the time t3, the signal S6 again assumes the binary value 0 and the AND-gate U2 emits no stepping pulses ST2 at this time.

At the time t4 the signal S6 reassumes the binary value 1, and as the originally stored binary values have now been entirely read out from the shift register SR1, the signal S6 retains its binary value 1. Thus the AND-gate U2 continues to emit stepping pulses ST2.

The stepping pulses ST2 are present at the pulse train input of the shift register SR2. This shift register SR2 is likewise initially brought by the resetting signal RS into its basic position in which the binary value 0 is stored in all stages. A signal having the binary value 1 is likewise present at the serial data input of the shift register SR2. With each element pulse train ST2 the contents of the shift register SR2 is displaced by one stage. From its output, the shift register SR2 feeds a release signal S7 to a AND-gate U3 which produces the resetting signal RS when the signal S3 is received. The resetting signal RS indicates that the synchronising process is terminated.In order, however, to prevent the synchronising process being broken off during the starting up of the stepping motor SM due to oscillations and a possibly associated short occurrence of the synchronisation signal S3, the synchronisation signal S3 does not produce a reset signal RS until the release signal S7 has the binary value 1.

At the time t4 is assumed that the synchronisation signal S3 temporarily occurs as a result of a disturbance.

As, however, the release signal S7 does not assume the binary value 1 until the fifth element pulse train ST2 occurs at the time t5, no resetting signal RS is produced. Thus the flip-flop FF remains set and the synchronising process is not terminated.

After a plurality of stepping pulses ST2 following the occurrence of the release signal S7 it is assumed that the synchronisation signal S3 occurs and thus the synchronising position has been reached. When the stepping pulse signal ST2 assumes the binary value 0, the AND-gate U3 emits the resetting signal RS which resets the flip-flop FF and resets the shift registers SR1 and SR2 to their basic positions.

When the shift register SR2 assumes its basic position, the signal S7 also reassumes the binary value 0, and the resetting signal RS is terminated. The resetting signal RS also triggers the time element ZG which produces the signal AV for a given length of time. On the resetting of the flip-flop FF by the signal RS, the control signal S5 assumes the binary value 0 and the pulse generator TG emits no further stepping pulses ST2.

At the time t7 it is assumed that, as a result of oscillations of the type carrier TT, the synchronisation signal S3 is temporarily interrupted and assumes the binary value 0. Since, however, the signal AV has the binary value 1, the signal S4 retains the binary value 0 and the flip-flop FF is not set again. Shortly after the time t7 the synchronisation signal S3 reassumes the binary value 1 as the type carrier TT occupies the synchronising position.

At the time t8 it is assumed that it is established in the control unit of the printer that the next position of the type carrier TT which is to be set is equivalent to the synchronising position. The signal S2 assumes the binary value 1. As, however, the type carrier IT already occupies its synchronising position, the blocking signal SP at the output of the NAND-gate N3 assumes the binary value 0 and prevents the switch-through by the AND-gate G3 (figure 1) of the next stepping pulse ST to the stepping motor control unit SST.

the store, designed as shift register SR1, in the pulse generator TG contains the start programme for the acceleration of the stepping motor SM. The sequence of the stored binary values indicates whether individual timing pulses LT are to be gated out or not. By means of a suitable selection of the binary values it is possible to arrange that the stepping motor SM operates as soon as possible with an approximately constant load angle and thus a clearly defined coordination exists between the stepping pulse trains and the position of the stepping motor SM and the type carrier IT. In this way it is possible to break off the movement of the stepping motor SM and thus of the type carrier IT immediately the synchronising position has been reached.

WHAT WE CLAIM IS: 1. A printer comprising a type carrier driven by a stepping motor, a control unit for supplying stepping pulses to the stepping motor and arranged, in operation, to produce a triggering signal whenever the type carrier is required to be in a selected position, means arranged, in operation, to produce a synchronisation signal whenever the type carrier assumes said selected position, and synchronising means for synchronising the type carrier to the control unit, in which the synchronising means includes a pulse generator operable to supply additional stepping pulses to the motor and includes control means arranged to initiate operation of the pulse generator whenever a triggering signal is received in the absence of a synchronisation signal, and to terminate operation of the pulse generator when a synchronisation signal is received.

2. A printer as claimed in claim 1, in which the synchronising means includes a flip-flop which is set by the triggering signal when the synchronisation signal is not present, which is reset following the occurrence of the synchronisation signal, and which, when set, provides at its output a control signal which enables the pulse generator.

3. A printer as claimed in claim 1 or 2, in which the pulse generator comprises an oscillator for producing timing pulses, a store which stores binary values which are assigned to a start programme for the stepping motor and which are read out under the control of the timing pulses and a logic gate by which the read-out binary values are used to gate the timing pulses to produce said additional stepping pulses at the output of the gate.

4. A printer as claimed in claim 3, in which the store is a shift register.

5. A printer as claimed in any one of claims 1 to 4, in which the synchronising means further includes time delay means arranged in operation to prevent termination by the synchronisation signal of operation of the pulse generator until a predetermined number of said additional stepping pulses have been supplied to the stepping motor.

6. A printer as claimed in claim 5, in which the time delay means controls a logic gate via which the synchronisation signal is fed to produce a resetting signal which terminates the synchronisation process.

7. A printer as claimed in claim 6, in which the synchronising means further includes further time delay means which are supplied with the resetting signal and produce a signal which prevents the setting of the flip-flop for a predetermined length of time following the occurrence of the resetting signal.

8. A printer substantially as herein described with reference to the accompanying drawings.

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **. the store, designed as shift register SR1, in the pulse generator TG contains the start programme for the acceleration of the stepping motor SM. The sequence of the stored binary values indicates whether individual timing pulses LT are to be gated out or not. By means of a suitable selection of the binary values it is possible to arrange that the stepping motor SM operates as soon as possible with an approximately constant load angle and thus a clearly defined coordination exists between the stepping pulse trains and the position of the stepping motor SM and the type carrier IT. In this way it is possible to break off the movement of the stepping motor SM and thus of the type carrier IT immediately the synchronising position has been reached. WHAT WE CLAIM IS:

1. A printer comprising a type carrier driven by a stepping motor, a control unit for supplying stepping pulses to the stepping motor and arranged, in operation, to produce a triggering signal whenever the type carrier is required to be in a selected position, means arranged, in operation, to produce a synchronisation signal whenever the type carrier assumes said selected position, and synchronising means for synchronising the type carrier to the control unit, in which the synchronising means includes a pulse generator operable to supply additional stepping pulses to the motor and includes control means arranged to initiate operation of the pulse generator whenever a triggering signal is received in the absence of a synchronisation signal, and to terminate operation of the pulse generator when a synchronisation signal is received.

4. A printer as claimed in claim 3, in which the store is a shift register.