GB1566181A - Method and a device for contactless speed measurement - Google Patents

Description

(54) A METHOD AND A DEVICE FOR CONTACTLESS SPEED MEASUREMENT (71) We, ROBERT BOSCH GMBH., a German Company, of Postfach 50, 7 Stuttgart 1, Federal Republic of Germany, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement:- The invention relates to contactless measurement of the relative speed of two bodies.

German Offenlegungsschrift 2,133,942 describes a method for contactless speed measurement by means of two measuring elements which are disposed one behind the other in the direction of the relative movements on one of the bodies and which produce signals corresponding to the physical structure, in particular the surface structure, of the other body and offset relative to one another by a speeddependent running time. These signals are correlated after retardation of the signal of the front measuring element in the direction of the relative movement in an evaluating device which supplies an indication of the relative speed and/or a value linked therewith.

The signals to be compared or correlated are quantized in delimiters. According to the known method, the signal from the front measuring element is automatically retarded by such a running time that the mean square deviation of the two signals is a minimum. Retardation is controlled by an integral action controller whose construction is relatively complex. Similar methods are known from German Offenlegungsschrifts 2,219,342, 2,331,145, 2,219,343 and 2,219,900. A common factor of all known methods for non-contact speed measurement is that the correct retardation of the output signal of the front measuring element is gained in a regulating process which necessitates a corresponding outlay in terms of circuitry, the usual criteria of regulating technology having to be strictly regarded in order to avoid undesirable oscillation phenomena and the like while maintaining a reasonable regulation period.

this often being possible only by means of additional devices, for example, a coarse regulator which cooperates with the fine regulator and prevents the adjustment of the regulating cycle to false values.

The aim of the invention is to indicate a method and a device for non-contact speed measurement in which, with a low technical outlay, rapid and accurate measurement of the relative speed of two bodies is possible even with rapid time changes in the relative speed.

Accordingly the present invention provides a method for contactless measurement of the relative speed of two bodies by means of two measuring elements which are disposed on one of the bodies one behind the other in the direction of the relative movement of the bodies and which produce signals corresponding to the physical structure, in particular the surface structure, of the other body and are temporally offset relative to one another by a speed-dependent running time, these signals being correlated after retardation of the signal of the front measuring element in the direction of the relative movement in an evaluating device which supplies an indication of the relative speed and/or a value linked therewith, wherein several signals which are each retarded to a differing degree are produced simultaneously from the signal of the front measuring element, each individual retarded signal is compared with the signal of the rear measuring element in the direction of the relative movement in order to determine the signal pair giving optimum correlation, and a speed reading corresponding to the retardation of the retardation signal of this signal pair is produced.

The present invention provides a device for contactless measurement of the relative speed of two bodies comprising a retardation circuit connected to a first measuring element, the retardation circuit, having several outputs at which differently retarded signals may be tapped and wherein each of these outputs of the retardation circuit is connected to one input of a different one of several logic gate circuits -whose second input is connected to the output of a second measuring element, and the output of each of the gate circuits is connected by an integration member to an indicating device the two measuring elements being disposed on one of the bodies and the second measuring element being disposed behind the first measuring element in respect of the direction of motion. The retardation circuit may comprise a shift register.

Thus in the method according the invention, unlike previously known methods, a large number of signals which varies depending upon accuracy requirements is available at any moment, these signals being retarded by different times, and each of these signals is immediately compared with the signal of the rear measuring element to determine the signal pair giving the optimum correlation.

In this manner, the laborious, technically complicated task of scanning towards the correct retardation time is avoided and it is at the same time possible to determine changes in speed rapidly and reliably without the risk of incorrect measurements such as occur with rapid speed changes in the known methods where regulation can get out of step as a result of too great regulating time constants.

It is advantageous if the signals of the two measuring elements are converted into single-digit binary signals and are compared by means of logic circuits with subsequently connected analogue integration members. It is possible in this manner to keep the circuitry outlay for effecting the method according to the invention particularly low.

In so doing, it is advantageous if the digitization in terms of the binary 0 and 1, of the signal amplitudes is adjusted in dependence upon the mean signal amplitude at the output of at least one of the measuring elements. It is thereby possible to allow for slow changes in the physical structure of the second body, for example, gradual changes in the surface structure of a road, leading to as accurate a speed measurement as possible. The digitization may be effected in respective threshold value circuits receiving the signals from the two measuring elements.

An Important advantage of a preferred embodiment of the invention is that the signal processing, past the threshold valve circuits, including the comparison of the two voltages, is effected purely digitally so that here full use may be made of the low trouble incidence of digital technology and the advantages of modern semiconductor technology. Another fundamental advantage is that the individual integration circuits, which are preferably simply RCmembers, may be individually tuned to the various retardation times and in fact in such a manner that for short retardation times a shorter integration time and for greater retardation times a longer integration time is selected. It is advantageous if exclusive OR gates are provided as logic gate circuits since use of these components during integration not only permits determination of the times at which both signals have the binary value 0 but also determination of the period of time during which both signals have the binary value 1. This further reduces the time taken to reach a decision on the similarity of the two signals to be comDared.

ihe switching thresholds of the two threshold value circuits may be adjustable so that they may be adjusted in dependence on mean signal amplitude for the reason given above. This ability is particularly advantageous when measuring speeds from a travelling motor vehicle since the average structure of the surface of a road may vary extremely in dependence upon weather conditions, the building materials used etc.

If the adjusting inputs of the threshold value circuits are connected to the output of one of the threshold value circuits through the series connection of an averaging circuit and a comparator having an adjusting element. Another possibility is for an averaging circuit to be directly connected to the output of one of the measuring elements, a voltage being supplied from the output of the averaging circuit to the threshold value circuits to determine the switching thresholds of these circuits.

It is also advantageous if the shift cycle for the shift register is adjustable in stages.

This measure provides a range selection which enables a large speed range to be covered with a limited number of retarded measuring signals. Preferably such a measuring range selection according to the invention is automatic. In a preferred embodiment of the invention, to effect automatic measuring range selection an updown counter having two inputs is provided, which inputs are connected to the outputs of integration circuits for the greatest and the smallest retardation time and in which register a single binary 1 during triggering by one of these two outputs is displaceable to the up or down direction in order to connect a selected output of a divider chain connected after a timing generator to the timing input of the shifting register by way of an associated output of the up-down counter. A measuring range selection is therefore always effected when the uppermost or lowest limit of a measuring range is attained. The measuring ranges are preferably so selected as to partially overlap so that with a speed falling at the end of a measuring range there is not a continuous switching over from one measuring range to the next measuring range.

Whereas the indicating device without measuring range selection may be formed simply by bulbs or the like at the outputs of the individual integration members, a logic circuit having a corresponding switching threshold, in particular an inverter, preferably being inserted between the bulb and the output of the integration member and the bulbs being disposed along a fixed scale on which the relevant speed values are plotted, it is necessary with a device having measuring range selection to provide several scales or the like which a respective one is activated, for example, lit, depending upon the position of the up-down counter.

Finally it also may be advantageous if a converting arrangement is provided by means of which a digital and/or analogue speed signal may be derived from the output signals of the integration circuits and of the up-down counter.

The present invention is further described hereinafter, by way of example, with reference to the accompanying drawing which shows a diagrammatical wiring diagram of a preferred embodiment of the present invention.

In the drawing, a surface area B of a body, for example, the surface of a road is indicated in the lefthand upper part. All the parts of the circuit shown in the drawing are located, however, on a second body (not shown), for example on a road vehicle.

The circuit in question has two measuring elements 1 and 2 facing towards the surface area B and in the form of, for example, photoelectric cell arrangements which determine a changing reflectivity of the surface area B.

For the following analysis it is assumed that the measuring element 1 is located farther forward in the direction of the relative movement for which reason this measuring element is hereinafter designated front measuring element 1. Accordingly the measuring element 2 is hereinafter known as rear measuring element 2. The outputs of the measuring elements 1 and 2 are connected to threshold value circuits 3 and 4. The output signal of the threshold value circuit 3, which is a sequence of binary 0and signals, is supplied to a shift register arrangement made up of two individual shift registers 9 and 11. The shift register 9 delays the signal sequence from the output of the threshold value circuit 3 by a time constant r,, while each individual stage of the second shift register 11 delays the retarded output signals from the first shift register 9 by a time constant TiN. N denotes the number of stages of the second shift register 11 so that, on condition that the entire retardation caused by the shift register 11 is again equal to the time constants t,. signal sequences are produced at the individual outputs 12 of this shift register which, compared to the signal sequence at the output of the threshold value circuit 3, produce signal sequences which are retarded by n Zn=to:l+ -- ), n=0, 1, . . . N.

N The individual outputs 12 of the second shift register 11 of the shift register arrangement 9, 11 are each connected to an input of a series of exclusive Or gates 13 across whose second input the output signal of the threshold value circuit 4 associated with the rear measuring element 2 is applied. The output of each of the gates 13 is connected to an integration circuit 14 which, as indicated in the drawing, may simply comprise an RC-member.

Connected to the outputs of the integration circuits 14 are inverters 15 whose output is in turn connected to a bulb 16 or the like. A scale 17 is associated with the bulbs and has plotted thereon speed values associated with the individual bulbs 16.

The circuit according to the invention operates as follows: The two meausring elements 1 and 2 are disposed one behind the other in the direction of the relative movement at a distance L and scan a point or a small area of the surface area B. Irregularities in the condition of the surface area B have the result that time-variable statistical electrical signals s1 (t) and s2 (t) are produced at the outputs of the measuring elements 1 and 2. The signal s2 of the rear measuring element 2 has basically the same shape as the signal s1 of the front measuring element 1 and is merely retarded compared to it by the running time T required by the measuring element 2 to travel the distance L. When the distance L is known and when the running time T can be determined, the relative speed v may be produced from the known equation v=L/T.

The running time T is determined using the method according to the invention in that the output signals of the front measuring element 1 retarded by different time constants Tn are compared at the outputs 12 of the shift register 11 by the gates 13 individually with the output signal of the rear measuring element 2 after digitizing of this signal in the threshold value circuit 4. If this comparison shows that the two signals of a signal pair are equal or substantially equal, it is known that the retardation time m by which the output signal of the front measuring element 1 was delayed is equal to the running time T.

However, according to the equation indicated above, this running time is associated with a fixed speed. In the circuit according to the invention, the gates 13 only produce a signal at their outputs when the signals at their inputs differ. These signals are integrated in the integration circuits 14 which trigger the subsequently connected inverter 15 accordingly so that the associated bulbs 16 do not light. A binary 0 is constantly produced only at the output of one of the gates 13 as a result of the uniformity of the signals at its inputs so that the associated bulb is switched on through the relevant integration circuit 14 and the subsequently connected inverter 15. At any rate, there is a possibility that a 1 occurs at the outputs of two gates 13 as a result of the substantial uniformity of the input signals only for so short a time that two bulbs 16 respond simultaneously. This occurs when the actual running time T lies exactly between two retardation times Tn. In all other cases where the running time T does not exactly coincide with one of the retardation times 2,, a definite speed indication is ensured by optimum selection of the threshold value voltages of the inverters 15 and the time constants of the integration members 14.

The circuit, to the extent it has been described till now, may only be used to measure speeds within a specific range determined by the time constant z,. In the present embodiment, only running times T between To and 2To may be determined. The measuring accuracy within this range, errors by the measuring elements excluded, is dependent upon the number of the outputs 12 and the tripping ability of the circuits disposed thereafter. The absolute value of the retardation time To is, however, also dependent upon the timing frequency ft which is applied across the input of the shifting registers 9 and 11. Thus, in the circuit a measuring range selection may be effected simply by varying the timing frequency ft for the shift registers 9, 11.

In a development of the embodiment this measuring range selection is effected automatically as follows: the outputs of the inverters 15 which respond at the greatest possible retardation time To+Tn at the lowest speed, and at the shortest possible retardation time To+T1, i.e. at the highest speed are connected to two inputs 19 and 20 of an up-down counter 21 which, in the embodiment, is a four-digit shift register in which at one point there is a binary 1. If the upper or lower limit of a measuring range is reached, this binary I is then moved forward a point, this being, in the illustrated circuit, with a signal on the line 19 downwards and with a signal on the line 20 upwards. The register 21 has four outputs, each of which is connected to an input of four AND-circuits 22. Connected to the second input of each AND-circuit 22 is an output of a divider chain 26 whose input is connected to a timing generator 25.

The outputs of the four AND-circuits 22 are connected to the four inputs of an OR circuit 24 whose output is connected to the timing inputs 10 of the shift registers 9 and 11. Four timing frequencies fO, fed2, fd4 and fd8 are available at the outputs of the divider chain 26. Since at any one time only one of the AND-circuits 22 is triggered with a binary 1 through the outputs of the shift register 21, only one of the named frequencies is allowed through to the timing inputs 10 of the shift registers 9 and 11. It is clear that a random number of measuring ranges may be created in the described manner by means of an up-down counter of corresponding digits. The four outputs of the shift register 21 are simultaneously connected by lines 28 to indicating lights 29 which are used to light up the scale 17 and three other scales 18. Because only one binary 1 is received in the shift register 21, only one of the scales 17, 18 is lit up at any one time so that a clear connection is ensured between the lit bulb 16 and a specific speed mark on one of the scales 17, 18. Since speeds beyond the provided speed ranges cannot be indicated, it is expedient to prevent the binary 1 from becoming lost in the shift register 21. For this reason, there is provided at the data input and at the data output of the shift register 21 a data buffer 27 in which the binary 1 is stored when a measuring range is exceeded until the speed again falls into one of the provided speed ranges. In particular, one of the data buffers 27 is used at the beginning of a movement process to store a binary 1 at the digit of the shift register 21 associated with the lowest speed. Instead of the automatic devices for measuring range selection or in addition to them, manually actuable devices for speed selection may be provided, in particular for connecting the correct measuring range in the event of a breakdown.

The illustrated circuit also has, a converting arrangement which is used to convert the measured speed into electrical signals which are suitable for further processing, for example, for integration to determine the distance travelled.

In particular, the converting arrangement has two code converters 30 and 31, which preferably take the form of diodetransmission matrices, and a digital dividing unit 32. A digital-analogue converter 33 is also provided at whose output an analogue signal proportional to the measured speed may be tapped. The inputs of the code converters 30 and 31 are connected to the outputs of the shift register 21 or to the outputs of the inverters 15. By way of example, the numbers are registered in the two code converters 30 and 31 which must stand at the output on triggering of the relevant inputs so that, provided that the distance L and the timing frequency f0 are correctly tuned to one another, the result will appear at the output of the dividing unit 32 in a digital form in km/h.

So that with changing surface condition of the surface area B the occurrence of the binary values 0 and I of the quantized signals SI, Z does not change, there is also provided a regulating circuit which lies between the output of the threshold value circuit 3 and a regulating input of the same and which has an averaging circuit 5 and an adjusting member 6. The circuit 5 has a very high time constant and causes an adjustment of the adjusting member 6 when one of the binary values, for example the 0, as opposed to the other binary value for example the 1, occurs clearly more frequently during a longer period of time.

The adjusting member 6 is influenced in such a manner that the threshold value of the threshold value circuit 3 is so displaced that a balanced relation between occurrence of the binary 0 and of the binary I is again produced. The adjusting member 6 is also connected to the threshold value circuit 4 for the rear measuring element 2 so that on this channel too, allowance is made for gradual changes in the surface condition.

As is indicated by dotted lines in the drawing, there is also the possibility of evaluating the output signal of the measuring element I directly in an integration member 5a having a great time constant and of supplying a voltage corresponding to the time mean value of the analogue signal Sl to the threshold value circuits 3 and 4 through the lines 7 or 8 as a threshold value voltage.

WHAT WE CLAIM IS: 1. A method for contactless measurement of the relative speed of two bodies by means of two measuring elements which are disposed on one of the bodies, one behind the other in the direction of the relative movement of the bodies, and which produce signals corresponding to the physical structure, in particular the surface structure of the other body and are temporally offset relative to one another by a speed-dependent running time, these signals being correlated after retardation of the signal of the front measuring element in the direction of the relative movement, in an evaluating device which supplies an indication of the relative speed and/or a value linked therewith, wherein several signals which are each retarded to a differing degree are produced simultaneously from the signal of the front measuring element, each individual retarded signal is compared with the signal of the rear measuring element in the direction of the relative movement in order to determine the signal pair giving optimum correlation, and a speed reading corresponding to the retardation of the retarded signal of this signal pair is produced.

2. A method as claimed in claim 1, in which the signals of the two measuring elements are converted into single digit binary signals and are compared with one another by means of a logic connection.

3. A method as claimed in claim I or 2, in which the association of the binary 0 and 1 to the signal amplitudes is regulated in dependence upon the average signal amplitude at the output of at least one of the measuring elements.

4. A device for contactless measurement of the relative speed of two bodies comprising a retardation circuit connected to a first measuring element, the retardation circuit having several outputs at which differently retarded signals may be tapped and wherein each of these outputs of the retardation circuit is connected to one input of a different one of several logic gate circuits whose second inputs are connected to the output of a second measuring element, and the output of each of the gate circuits is connected by an integration member to an indicating device the two measuring elements being disposed on one of the bodies and the second measuring element being disposed behind the first measuring element in respect of the direction of relative motion.

5. A device as claimed in claim 4, in which a threshold value circuit is provided between the output of the first measuring element and the retardation circuit and between the output of the second measuring and the inputs of the logic gate circuits respectively.

6. A device as claimed in claim 5, in which the switching thresholds of the two threshold circuits may be regulated.

7. A device as claimed in claim 6, in which the regulating inputs of the threshold value circuits are connected to the output of one of the threshold value circuits through the series connection of an averaging circuit and a comparator having an adjuSLine member.

8. A device as claimed in claim 6, in which connected to the output of one of thc

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (17)

**WARNING** start of CLMS field may overlap end of DESC **. also provided at whose output an analogue signal proportional to the measured speed may be tapped. The inputs of the code converters 30 and 31 are connected to the outputs of the shift register 21 or to the outputs of the inverters 15. By way of example, the numbers are registered in the two code converters 30 and 31 which must stand at the output on triggering of the relevant inputs so that, provided that the distance L and the timing frequency f0 are correctly tuned to one another, the result will appear at the output of the dividing unit 32 in a digital form in km/h. So that with changing surface condition of the surface area B the occurrence of the binary values 0 and I of the quantized signals SI, Z does not change, there is also provided a regulating circuit which lies between the output of the threshold value circuit 3 and a regulating input of the same and which has an averaging circuit 5 and an adjusting member 6. The circuit 5 has a very high time constant and causes an adjustment of the adjusting member 6 when one of the binary values, for example the 0, as opposed to the other binary value for example the 1, occurs clearly more frequently during a longer period of time. The adjusting member 6 is influenced in such a manner that the threshold value of the threshold value circuit 3 is so displaced that a balanced relation between occurrence of the binary 0 and of the binary I is again produced. The adjusting member 6 is also connected to the threshold value circuit 4 for the rear measuring element 2 so that on this channel too, allowance is made for gradual changes in the surface condition. As is indicated by dotted lines in the drawing, there is also the possibility of evaluating the output signal of the measuring element I directly in an integration member 5a having a great time constant and of supplying a voltage corresponding to the time mean value of the analogue signal Sl to the threshold value circuits 3 and 4 through the lines 7 or 8 as a threshold value voltage. WHAT WE CLAIM IS:

1. A method for contactless measurement of the relative speed of two bodies by means of two measuring elements which are disposed on one of the bodies, one behind the other in the direction of the relative movement of the bodies, and which produce signals corresponding to the physical structure, in particular the surface structure of the other body and are temporally offset relative to one another by a speed-dependent running time, these signals being correlated after retardation of the signal of the front measuring element in the direction of the relative movement, in an evaluating device which supplies an indication of the relative speed and/or a value linked therewith, wherein several signals which are each retarded to a differing degree are produced simultaneously from the signal of the front measuring element, each individual retarded signal is compared with the signal of the rear measuring element in the direction of the relative movement in order to determine the signal pair giving optimum correlation, and a speed reading corresponding to the retardation of the retarded signal of this signal pair is produced.

2. A method as claimed in claim 1, in which the signals of the two measuring elements are converted into single digit binary signals and are compared with one another by means of a logic connection.

3. A method as claimed in claim I or 2, in which the association of the binary 0 and 1 to the signal amplitudes is regulated in dependence upon the average signal amplitude at the output of at least one of the measuring elements.

4. A device for contactless measurement of the relative speed of two bodies comprising a retardation circuit connected to a first measuring element, the retardation circuit having several outputs at which differently retarded signals may be tapped and wherein each of these outputs of the retardation circuit is connected to one input of a different one of several logic gate circuits whose second inputs are connected to the output of a second measuring element, and the output of each of the gate circuits is connected by an integration member to an indicating device the two measuring elements being disposed on one of the bodies and the second measuring element being disposed behind the first measuring element in respect of the direction of relative motion.

5. A device as claimed in claim 4, in which a threshold value circuit is provided between the output of the first measuring element and the retardation circuit and between the output of the second measuring and the inputs of the logic gate circuits respectively.

6. A device as claimed in claim 5, in which the switching thresholds of the two threshold circuits may be regulated.

7. A device as claimed in claim 6, in which the regulating inputs of the threshold value circuits are connected to the output of one of the threshold value circuits through the series connection of an averaging circuit and a comparator having an adjuSLine member.

8. A device as claimed in claim 6, in which connected to the output of one of thc

measuring elements directly is an averaging circuit from whose output a voltage may be supplied to the threshold value circuits for determining their switching thresholds.

9. A device as claimed in any of claims 4 to 8, in which a timed shift register arrangement is provided as a retardation circuit.

10. A device as claimed in claim 9, in which the timing frequency for the shift register arrangement is adjustable in stages for measuring range selection.

11. A device as claimed in claim 10, in which the timing frequency for the shift register arrangement is automatically adjustable.

12. A device as claimed in any of claims 4 to 11, in which exclusive OR gates are provided as logic gate circuits.

13. A device as claimed in claim 11, in which an up-down counter is provided having two inputs which are connected to the outputs of the integration circuits for the greatest or the smallest retardation time, and in the register a single binary 1 when triggered by one of these two outputs is displaceable in the up or down direction in order to connect by way of an associated output of the counter a selected output of a divider chain connected after a timing generator to the timing input of the shift register arrangement.

14. A device as claimed in claim 13, in which a converting arrangement is provided by means of which a digital and/or analogue speed signal may be derived from the output signals of the integration circuits and/or of the up-down counter.

15. A device as claimed in any of claims 4 to 14, in which RC-members are provided as integration circuits.

16. A method substantially as hereinbefore described with reference to the accompanying drawing.

17. A device substantially as hereinbefore described with reference to the accompanying drawing.