GB1559837A

GB1559837A - Switching networks

Info

Publication number: GB1559837A
Application number: GB4495175A
Authority: GB
Original assignee: General Electric Co PLC
Current assignee: General Electric Co PLC
Priority date: 1976-11-01
Filing date: 1976-11-01
Publication date: 1980-01-30

Description

(54) IMPROVEMENTS IN OR RELATING TO SWITCHING NETWORKS (71) We, THE GENERAL ELECTRIC COMPANY LIMITED, of 1 Stanhope Gate, London W1A lEH, a British Company, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement:- The present invention relates to switching networks and more particularly to ex chang > s, for telecommunication systems, which are used for switching signals transmitted on telecommunication highways using Time Division Multiplex (TDM)ttech- niques.

Such Time Division signals are normally encoded into a Pulse Code Modulated (P.C.M.) form and may either intially represent analogue signals such as speech or may represent printed information as read by electronic reading apparatus. Such original information will be referred to hereinafter as data and the transmission system will be referred to as a P.C.M./ TDM transmission system.

An exchange is required to connect a number of incoming PCM/TDM data sig nals on incoming highways to a number of different output highways in any desired combination. To perform this function each exchange includes a Time-Space-Time switch.

According to the present invention there is provided a Time-Space-Time switch, for an exchange of a PCM/TDM transmission system, including a plurality of intersystem, including a plurality of interconnected modular switching units interconnected to form the space switching portion, each of said modular switching units having associated therewith a plurality of changeover switches, a first input of each changeover switch being connected to a respective output of a modular switching unit and a second input of each changeover switch being connected to a voltage source for connection of the said output of the modular switching unit or the said voltage source to an output of the space switching portion of the Time-Space-Time switch.

For the purposes of the present invention a changeover switch is defined as being a two position switch with two inputs and one output, in a first position of the changeover switch a first input only is connected to the output and in the second position the second input is connected to the output.

The changeover switch is preferably of the electronic type.

Preferably each modular unit includes one or more multiplexers each respective multiplexer being connected to selectively switch one input of a plurality of inputs to the output of the respective multiplexer the selection of the input connected to the output being under the control of a cross point address register.

The output of each multiplexer is preferably connected directly to one input of a respective changeover switch the other input of the switch being connected to the second modular unit via amplification and pulse regeneration circuits.

Preferably the output of each changeover switch is, in a quiescent state of its respective multiplexer, connected to the second input The second input of each changeover switch is preferably connected to a circuit providing incorrect parity information, this incorrect parity information being suppressable by a signal switched through any multiplexer connected to said changeover switch.

The second input of each changeover switch is selected in the quiescent state of its associated switching stage and the information presented to the output with all switches selecting their second states is arranged to be parity incorrect. Thus when valid information is to be transferred the appropriate switching stage provides parity correct information and the associated changeover switch changes over to transfer this information to the output.

Further, according to the present invention there is provided a method of detecting errors in a switching matrix comprising two or more modular switching units each connectable to a common output by a changeover switch, in which a partiy check is made on information at the common output, in which in the absence of correct parity information the changeover switch associated with a first modular switching unit adjacent to the common output is operated from its first position to its second position and in which at the time of operation of said changeover switch parity cor rect information is fed in to the input of said modular switching unit adjacent to the common output and a parity check is carried out on the information fed out from said modular unit, in which in the event of the parity of such information being correct the changeover switch is returned to its first position and the changeover switch associated with a second modular switching unit adjacent to the said last tested modular switching unit is operated into its second position parity correct information being then fed into said second modular switching unit.

An embodiment of the present invention will now be described with reference to the drawings accompanying the provisional specification in which: Figure 1 shows a Time-Space-Time switch; Figure 2 shows the Space switch of Figure 1 in more detail illustrating the present invention; Figure 3 shows in greater detail the connection of an input superhighway within a modular switching unit of the Space switch of Figure 1 and illustrates the present in invention; and Figure 4 shows the connection of a number of input superhighways to an output superhighway via the changeover switches of the present invention.

Referring now to Figure 1, there is shown an input Time switch 100, a Space switch 200 and an output Time switch 300.

The input Time switch 100 includes a number of time switches 101 . . . 196 of which only two are shown. for simplicity.

Each time switch 101 . . . 196 has n inputs and a single output 1011 . . . 1961. These outputs are fed to the inputs of the Space switch 200 as shown.

The Space switch 200 is constructed using modular units 1 to 9 which units are sub- stantially identical. These units will be described in greater detail hereinafter with reference to Figure 2.

The output time switch 300 is similar to the input time switch 100 but performs the function of the input time switch 100 in a reverse manner. The output time switch 300 includes a number of time switches 301 . . .396, such time switches 301 . . . 396 having a respective single input 3011...3961 and n outputs.

The number of inputs and outputs of the Space switch 200 is ninety-six or three sets of thirty-two inputs and outputs. Each input and output is termed a superhighway since it will carry n times the number of data inputs connected to each time switch on highways 1 to n.

For example if n = 32 and 8 PCM/ TDM data inputs are carried simultaneously on each of the n inputs to each time switch 101 . . . 196 then each output superhighway will carry 32 x 8 = 256 PCM/TDM data signals.

Referring now to Figure 2, the Space switch 200 is shown in greater detail. Each input superhighway 1011 . . . 1961 is connectable to each output superhighway 3011 . . . 3961 by interconnections in the matrix Space switches (1) . . . (9).

If a fault is present in an output signal on for example highway 3011 then it is desirable to be able to identify which modular switch unit (1) to (3) is responsible for this fault. To accomplish this each output superhighway for example 3011 is interconnected between modular switch units by changeover switches SW3011, and SW3012.

Similarly output superhighway 3961 is interconnected between modular switch units by changeover switches SW3961 and SW3962. These changeover switches are shown diagrammatically only in Figure 2 and the connections of the output highway to these switches is shown in Figure 4 in more detail. All other output superhighways will be connected through similar changeover switches but these are not shown for the sake of simplicity.

Referring now to Figure 3, switching matrix (3) is shown in greater detail and in particular the connection between input superhighway 1011 and output superhighway 3011 is shown by way of example.

The signal on input superhighway 1011 amplified in an amplifier 302 and the shape of the signal pulses are regenerated in a pulse regenerator 304. The output pulses from regenerator 304 are fed to inverting amplifier 306 and via inverting amplifier 308 to an output pulse regeneration and amplification circuit 310. This circuit is provided only for matrixes 1, 2, 3, 4, 5 and 6 since matrixes 7, 8 and 9 are in this particular example the last switching matrixes in the horizontal direction (left to right in Figure 2). Circuit 310 comprises a pulse regenerator circuit 312 and a balanced line driver 314.

The output of amplifier 306 is fed to a thirty-two way multiplexer 316, which is controlled by a crosspoint address register 318. Each input of the multiplexer can be connected at a given time to the output superhighway 3011 under the control of the cross point address register 318. The output of the multiplexer 316 is fed to one input, A, (see also Figure 4), of a changeover switch SW3012, the output of the changeover switch being fed via a pulse regenerator circuit 320 and to an output line driver 322.

The other input of changeover switch SW3012 is connected to an input pulse regeneration and amplification circuit 330.

This circuit comprises a balanced line detector and amplifier 332, a pulse regenerator circuit 334 and an inverting amplifier 336.

The circuit 330 is necessary only when a modular unit receives an input from a modular unit vertically above (top-tobottom in Figure 2) and such a circuit is therefore not necessary for modules 1, 4 and 7 of Figure 2.

All switches SW3012 etc. (see page 4) are, in the quiescent state i.e. at a line period when no data is passing through the multiplexer associated with the particular switch, connected so that the output is connected to the input i.e. to the preceding switching stage.

Circuits 330 and 310 are shown separately in Figure 3 since in a practical embodiment they are mounted on separate printed circuit boards and may therefore be omitted as required.

Referring now to Figure 4, the connection of superhighway 3011 to modular switching matrixes (1), (2) and (3) is shown.

The reference numerals in Figure 4 correspond for module 3 to those of Figure 3.

For modules 1 and 2 the initial numeral is respectively changed from a 3 to a 1 or a 2.

Each part of the superhighway 3011 is connected to each other part by the amplification and pulse regeneration circuits as described with reference to Figure 3. In addition resistor groups R1, R2, R3 represented by single resistors connected to a d.c. voltage V are connected to the highway 3011 at the inputs to the changeover switches SW3010, SW 3011 and SW3012.

Each resistor group R1, R2 or R3 consists of five resistors which are respectively connected to the five parallel paths which make up each superhighway. They supply five equal signals e.g. five l's and these are transmitted twice to give a ten bit signal consisting of all l's. This is an incorrect parity signal. These resistor groups provide parity incorrect information to the superhighway 3011 but are of high resistance and are therefore overridden by any output from a preceding amplifier. For example with the output of switch SW3010 connected in quiescent conditions to the B input the incorrect parity information supplied by resistor group R1 overrides that supplied by resistor group R2.

In the quiescent condition the parity incorrect information which is fed to the output of the Space switch and the store (not shown) at the output of the Space switch is filled with parity incorrect information.

The control memory (not shown) of the output time switch (which is connected to the Space switch) should be in a state such that idle information comprising a known pattern is fed to line. If a fault occurs in the control memory such that the line does not receive the chosen idle pattern of information then the line will receive the information stored in the output space switch which will be parity incorrect. This parity incorrect information is then detected at the output of the output time switch at the Bipolar line unit (see co-pending U.K.

Patent Application No. 18199/75) and an alarm is given indicating a fault condition.

(Serial No. 1 557 661).

The operation of the circuits of Figures 3 and 4 is as follows:- Under quiescent conditions all changeover switches are connected to the previous switching modules (if any) under the control of the cross point address register 318.

Parity incorrect information is therefore provided at the output of superhighway 3011 from resistor group R1. This is a fault condition and is detected by the central processor of the exchange (not shown). In normal switching conditions only one input superhighway may be connected to an output superhighway at any instant of time.

To accomplish this the appropriate multiplexer 316, 216 or 116 will be connected to the output superhighway via its respective changeover switch under the control of the respective cross point address register 318, 218 or 118.

Faults can occur before the input superhighway, in the multiplexer and in any of the changeover switches and amplifiers on the output and input superhighways and on the superhighways themselves. If a fault condition is detected on output superhighway 3011 by the presence of incorrect parity information on that superhighway then the procedure for fault detection is as follows:- Under the control of central processor, parity correct information is deliberately injected into any spare input within the range 1011-1321 i.e. into switching module (3).

Changeover switch SW3012 is connected to input A. If the fault on output superhigh way 3011 disappears then the fault is on highway 3011 above switch SW3012. If it does not disappear then the fault must be in the output superhighway 3011 or in the switch SW3012. The fault cannot be in the multiplexer complex unless other output superhighways also have similar faults.

If the fault disappears the central processor senses this and switches the output of changeover switch SW3012 back to the B input. A similar operation is then performed, parity correct information being injected on any spare input superhighway in the range 1331 to 164l i.e. into switching module 2. This process is repeated with switching module 1 or until the fault disappears. When the fault does not disappear then the section containing the fault is known.

Thus by a process of elimination a fault in the output of a Space switch constructed from a number of switching modules can be isolated very rapidly. In a practical embodiment the number of modules was sixtyfour in a 11 eight by eight array and therefore the above process may have to be repeated up to eight times before a fault is isolated.

WHAT WE CLAIM IS: 1. A space switch for a Time-Space-Time switch of a PCM/TDM transmission exchange, including a plurality of interconnected modular switching units interconnected to form the space switching portion, each of said modular switching units having associated therewith a plurality of changeover switches, a first input of each changeover switch being connected to a respective output of a modular switching unit and a second input of each changeover switch being connected to a voltage source for connection of the said output of the modular switching unit or the said voltage source to an output of the space switching portion of the Time-Space-Time switch.

2. A space switch as claimed in Claim 1 in which there are provided means to connect the second input of some of said changeover switches to an output of another of said modulear switching units.

3. A space switch as claimed in Claim 1 or Claim 2 in which the changeover switches are of the electronic type.

4. A space switch as claimed in any preceding claim in which each modular unit includes one or more multiplexers each respective multiplexer being connected to selectively switch one input of a plurality of inputs to the output of the respective multiplexer the selection of the input connected to the output being under the control of a cross point address register.

5. A space switch as claimed in Claim 4 in which the output of each multiplexer is connected directly to one input of a changeover switch the other input of the switch being connected to the second modular unit via amplification and pulse regeneration circuits.

6. A space switch as claimed in Claim 5 in which the output of each changeover switch is, in a quiescent state of its respective multiplexer, connected to the second input.

7. A space switch as claimed in Claim 6 in which the second input of each changeover switch is connected to a circuit providing incorrect parity information, this incorrect parity information being suppressable by a signal switched through any multiplexer connected to said changeover switch.

8. A space switch as claimed in claim 7 in which the second input of each changeover switch is selected in the quiescent state of its associated switching stage and the information presented to the output with all switches selecting their second states is arranged to be parity incorrect.

9. A method of detecting errors in a switching matrix comprising two or more modular switching units each connectable to a common output by changeover switches in which a parity check is made on information at the common output, in which in the absence of correct parity information a changeover switch associated with a first modular unit which modular unit is connected by said changeover switch to the common output, is operated to its first position and in which at the time of operation of said changover switch parity correct information is fed into the input of said first modular switching unit and a parity check is carried out from said first modular switching unit, in- which in the event d the parity of such information being correct the changeover switch is returned to its second position and a further changeover switch associated with a second modular unit connected by said further changeover switch to said last tested modular switching unit is operated into its first position, parity correct information being then fed into said second modular switching unit, said modular switching units, each with its associated changeover switches, forming a space switch as claimed in any preceding claim.

10. A space switch for a Time-Space Time switch of a PCM/TDM transmission exchange substantially as described with reference to the drawings accompanying the provisional specification.

11. A method of detecting errors in a switching matrix substantially as described with reference to the drawings accompanying the provisional specification.

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **. way 3011 disappears then the fault is on highway 3011 above switch SW3012. If it does not disappear then the fault must be in the output superhighway 3011 or in the switch SW3012. The fault cannot be in the multiplexer complex unless other output superhighways also have similar faults. If the fault disappears the central processor senses this and switches the output of changeover switch SW3012 back to the B input. A similar operation is then performed, parity correct information being injected on any spare input superhighway in the range 1331 to 164l i.e. into switching module 2. This process is repeated with switching module 1 or until the fault disappears. When the fault does not disappear then the section containing the fault is known. Thus by a process of elimination a fault in the output of a Space switch constructed from a number of switching modules can be isolated very rapidly. In a practical embodiment the number of modules was sixtyfour in a 11 eight by eight array and therefore the above process may have to be repeated up to eight times before a fault is isolated. WHAT WE CLAIM IS:

1. A space switch for a Time-Space-Time switch of a PCM/TDM transmission exchange, including a plurality of interconnected modular switching units interconnected to form the space switching portion, each of said modular switching units having associated therewith a plurality of changeover switches, a first input of each changeover switch being connected to a respective output of a modular switching unit and a second input of each changeover switch being connected to a voltage source for connection of the said output of the modular switching unit or the said voltage source to an output of the space switching portion of the Time-Space-Time switch.