GB1478685A - Programmable signal distribution systems - Google Patents
Programmable signal distribution systemsInfo
- Publication number
- GB1478685A GB1478685A GB40626/74A GB4062674A GB1478685A GB 1478685 A GB1478685 A GB 1478685A GB 40626/74 A GB40626/74 A GB 40626/74A GB 4062674 A GB4062674 A GB 4062674A GB 1478685 A GB1478685 A GB 1478685A
- Authority
- GB
- United Kingdom
- Prior art keywords
- outputs
- clock
- arrangement
- inputs
- array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000005540 biological transmission Effects 0.000 abstract 2
- 230000001934 delay Effects 0.000 abstract 1
- 230000006870 function Effects 0.000 abstract 1
- 239000011159 matrix material Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
- H03K5/05—Shaping pulses by increasing duration; by decreasing duration by the use of clock signals or other time reference signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/131—Digitally controlled
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Ceramic Engineering (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
- Bipolar Transistors (AREA)
- Static Random-Access Memory (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
1478685 Data transmission INTERNATIONAL BUSINESS MACHINES CORP 18 Sept 1974 [23 Nov 1973] 40626/74 Heading H4P A processing apparatus incorporates an arrangement to distribute timing i.e. clock signals, e.g. under programmable control, comprising an arrangement of cross point switches each coordinating with a memory cell which both determines and indicates the conductive state of associated switch each located at intersections of line sets, the cell being controlled to provide determined outputs for sets of inputs. Outputs may be complemented. Each switch may be considered as a pair of AND gates outputs from which provide an OR function; memory cells may be flip-flop circuits controlled by words in a shift register e.g. through a decoder. In the embodiment differential delays in transmission channels of differing length are compensated by a series of time displaced clock pulses provided and switched by a 12 x 14 matrix array each of cross point switches (12) (Fig. 3 not shown) having an associated memory cell (14). Each switch comprises AND gates (16, 18) to which clock inputs (Xa &c.) are applied. Array 10, Fig. 1 has columns (22, 26) to each of which 12 clock pair inputs are applied. Cells (14) receive output through word and bit decoders 28, 30 from shift register 32 into which address data is shifted by clock signals 1, 2, Output of 28 is 12 pairs of complimented signals XA, XA which are applied to array 10 to select appropriate cells. Similarly 30 provides outputs YA which select columns corresponding to the address. Complimented clock outputs a, a<SP>1</SP> are taken from (Ya, Ya<SP>1</SP>) lines (22, 26). Suitable transistor circuits for various parts of the arrangement are given in Figs. 4, 6 and 7 (not shown).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL6712617A NL6712617A (en) | 1967-09-15 | 1967-09-15 | |
US00418696A US3852723A (en) | 1967-09-15 | 1973-11-23 | Programmable signal distribution system |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1478685A true GB1478685A (en) | 1977-07-06 |
Family
ID=26644238
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB43407/68A Expired GB1236603A (en) | 1967-09-15 | 1968-09-12 | Transistors |
GB40626/74A Expired GB1478685A (en) | 1967-09-15 | 1974-09-18 | Programmable signal distribution systems |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB43407/68A Expired GB1236603A (en) | 1967-09-15 | 1968-09-12 | Transistors |
Country Status (10)
Country | Link |
---|---|
US (2) | US3582723A (en) |
JP (1) | JPS5085250A (en) |
BE (2) | BE720878A (en) |
CA (1) | CA1035026A (en) |
CH (2) | CH502697A (en) |
DE (2) | DE1764935A1 (en) |
FR (2) | FR1586205A (en) |
GB (2) | GB1236603A (en) |
NL (2) | NL6712617A (en) |
SE (1) | SE403663B (en) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3783349A (en) * | 1971-05-25 | 1974-01-01 | Harris Intertype Corp | Field effect transistor |
US3878550A (en) * | 1972-10-27 | 1975-04-15 | Raytheon Co | Microwave power transistor |
US3986174A (en) * | 1974-05-02 | 1976-10-12 | Motorola, Inc. | Communication switching system |
FR2272536B1 (en) * | 1974-05-20 | 1978-02-03 | Tokyo Shibaura Electric Co | |
US4284208A (en) * | 1979-08-09 | 1981-08-18 | H. R. Electronics Company | Vend control system |
JPS5818964A (en) * | 1981-07-28 | 1983-02-03 | Fujitsu Ltd | Semiconductor device |
US4513306A (en) * | 1982-12-27 | 1985-04-23 | Motorola, Inc. | Current ratioing device structure |
JPS59210668A (en) * | 1983-05-16 | 1984-11-29 | Fujitsu Ltd | Semiconductor device |
US4670749A (en) * | 1984-04-13 | 1987-06-02 | Zilog, Inc. | Integrated circuit programmable cross-point connection technique |
EP0190585A1 (en) * | 1985-02-01 | 1986-08-13 | Siemens Aktiengesellschaft | Disconnectible semiconductor device |
US4654687A (en) * | 1985-03-28 | 1987-03-31 | Francois Hebert | High frequency bipolar transistor structures |
US4644353A (en) * | 1985-06-17 | 1987-02-17 | Intersil, Inc. | Programmable interface |
JPH0712045B2 (en) * | 1988-03-02 | 1995-02-08 | 株式会社東海理化電機製作所 | Current detection element |
US5319261A (en) * | 1992-07-30 | 1994-06-07 | Aptix Corporation | Reprogrammable interconnect architecture using fewer storage cells than switches |
US6939625B2 (en) * | 1996-06-25 | 2005-09-06 | Nôrthwestern University | Organic light-emitting diodes and methods for assembly and enhanced charge injection |
JPH10303215A (en) * | 1997-04-30 | 1998-11-13 | Nec Corp | Semiconductor device |
US6587907B1 (en) * | 2000-05-01 | 2003-07-01 | Hewlett-Packard Development Company, L.P. | System and method for generating a clock delay within an interconnect cable assembly |
JP4468609B2 (en) * | 2001-05-21 | 2010-05-26 | 株式会社ルネサステクノロジ | Semiconductor device |
DE10332008B4 (en) * | 2003-07-14 | 2006-08-10 | Infineon Technologies Ag | Electrical circuit and method for testing electronic components |
DE10338303B4 (en) * | 2003-08-20 | 2005-11-17 | Infineon Technologies Ag | Circuit arrangement for distributing an input signal into one or more time positions |
WO2005052997A2 (en) * | 2003-11-21 | 2005-06-09 | Wisconsin Alumni Resarch Foundation | Solid-state high power device and method |
JP2007173463A (en) * | 2005-12-21 | 2007-07-05 | Ricoh Co Ltd | Reference voltage generating circuit |
US8144506B2 (en) * | 2009-06-23 | 2012-03-27 | Micron Technology, Inc. | Cross-point memory devices, electronic systems including cross-point memory devices and methods of accessing a plurality of memory cells in a cross-point memory array |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL273230A (en) * | 1961-01-09 | |||
US3444443A (en) * | 1966-12-26 | 1969-05-13 | Hitachi Ltd | Semiconductor device for high frequency and high power use |
JPS5219428B2 (en) * | 1971-08-13 | 1977-05-27 |
-
1967
- 1967-09-15 NL NL6712617A patent/NL6712617A/xx unknown
-
1968
- 1968-09-06 DE DE19681764935 patent/DE1764935A1/en active Pending
- 1968-09-11 US US759166A patent/US3582723A/en not_active Expired - Lifetime
- 1968-09-12 CH CH1363268A patent/CH502697A/en not_active IP Right Cessation
- 1968-09-12 GB GB43407/68A patent/GB1236603A/en not_active Expired
- 1968-09-13 BE BE720878D patent/BE720878A/xx unknown
- 1968-09-13 FR FR1586205D patent/FR1586205A/fr not_active Expired
-
1973
- 1973-11-23 US US00418696A patent/US3852723A/en not_active Expired - Lifetime
-
1974
- 1974-09-18 GB GB40626/74A patent/GB1478685A/en not_active Expired
- 1974-10-09 FR FR7434702A patent/FR2252602B1/fr not_active Expired
- 1974-10-16 JP JP49118314A patent/JPS5085250A/ja active Pending
- 1974-10-16 CA CA211,476A patent/CA1035026A/en not_active Expired
- 1974-10-23 BE BE149796A patent/BE821381A/en not_active IP Right Cessation
- 1974-10-24 DE DE2450528A patent/DE2450528C3/en not_active Expired
- 1974-10-30 CH CH1451774A patent/CH576674A5/xx not_active IP Right Cessation
- 1974-11-11 NL NL7414652A patent/NL7414652A/en not_active Application Discontinuation
- 1974-11-13 SE SE7414240A patent/SE403663B/en unknown
Also Published As
Publication number | Publication date |
---|---|
NL7414652A (en) | 1975-05-27 |
AU7370174A (en) | 1976-04-01 |
DE2450528A1 (en) | 1975-06-05 |
CA1035026A (en) | 1978-07-18 |
FR2252602A1 (en) | 1975-06-20 |
JPS5085250A (en) | 1975-07-09 |
DE2450528C3 (en) | 1980-10-30 |
CH502697A (en) | 1971-01-31 |
FR1586205A (en) | 1970-02-13 |
FR2252602B1 (en) | 1976-10-22 |
DE2450528B2 (en) | 1980-02-21 |
GB1236603A (en) | 1971-06-23 |
SE7414240L (en) | 1975-05-26 |
US3582723A (en) | 1971-06-01 |
DE1764935A1 (en) | 1972-01-13 |
CH576674A5 (en) | 1976-06-15 |
BE821381A (en) | 1975-02-17 |
BE720878A (en) | 1969-03-13 |
US3852723A (en) | 1974-12-03 |
SE403663B (en) | 1978-08-28 |
NL6712617A (en) | 1969-03-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed [section 19, patents act 1949] | ||
PCNP | Patent ceased through non-payment of renewal fee |