GB1466323A - Electronic logic circuit and asequential and asynchronous control system comprising a plurality of such logic circuits - Google Patents

Electronic logic circuit and asequential and asynchronous control system comprising a plurality of such logic circuits

Info

Publication number
GB1466323A
GB1466323A GB1509874A GB1509874A GB1466323A GB 1466323 A GB1466323 A GB 1466323A GB 1509874 A GB1509874 A GB 1509874A GB 1509874 A GB1509874 A GB 1509874A GB 1466323 A GB1466323 A GB 1466323A
Authority
GB
United Kingdom
Prior art keywords
transistor
output
capacitor
stable
asequential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1509874A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Bpifrance Financement SA
Original Assignee
Agence National de Valorisation de la Recherche ANVAR
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agence National de Valorisation de la Recherche ANVAR, Thomson CSF SA filed Critical Agence National de Valorisation de la Recherche ANVAR
Publication of GB1466323A publication Critical patent/GB1466323A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28—Modifications for introducing a time delay before switching

Abstract

1466323 Transistor switching and pulse shaping circuits THOMSON-CSF and AGENCE NATIONALE POUR LA VALORISATION DE LA RECHERCHE 4 April 1974 [6 April 1973] 15098/74 Heading H3T A switching circuit for delaying the leading and trailing edges of a pulse by different amounts comprises a capacitor C1 charged through a first resistive path R7, R9, R10 and discharged through a second resistive path R10 to give two different time constants, the assembly being connected between the collector of a first transistor T 5 and a second transistor T 6 acting as a current amplifier and being followed by an output stage T 7 and being fed from a bi-stable 10, 11. When the bi-stable output changes to a logical "0", transistor T 5 is cut off and capacitor C1 charges through resistors R 7 , R 9 , R 10 until transistors T 6 , T 7 switch on to produce a "0" output after a first delay. If the bi-stable output is switched to a "1" level, transistor T 5 is switched on and the capacitor discharges through R 10 until transistors T 6 , T 7 cuts off after a second, different delay to give a "1" output.
GB1509874A 1973-04-06 1974-04-04 Electronic logic circuit and asequential and asynchronous control system comprising a plurality of such logic circuits Expired GB1466323A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7312536A FR2224944B1 (en) 1973-04-06 1973-04-06

Publications (1)

Publication Number Publication Date
GB1466323A true GB1466323A (en) 1977-03-09

Family

ID=9117563

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1509874A Expired GB1466323A (en) 1973-04-06 1974-04-04 Electronic logic circuit and asequential and asynchronous control system comprising a plurality of such logic circuits

Country Status (4)

Country Link
DE (1) DE2416731A1 (en)
FR (1) FR2224944B1 (en)
GB (1) GB1466323A (en)
IT (1) IT1005941B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1982002808A1 (en) * 1981-02-06 1982-08-19 Ludowyk Christopher John Gating circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1982002808A1 (en) * 1981-02-06 1982-08-19 Ludowyk Christopher John Gating circuit
US4494013A (en) * 1981-02-06 1985-01-15 The Commonwealth Of Australia Gating circuit with spurious signal prevention means

Also Published As

Publication number Publication date
FR2224944A1 (en) 1974-10-31
DE2416731A1 (en) 1974-10-24
FR2224944B1 (en) 1977-08-05
IT1005941B (en) 1976-09-30

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee