GB1448496A - Variable time ratio control - Google Patents

Abstract

1448496 Transistor switching circuits; protecting transistors from overload ALLISCHALMERS CORP 19 Dec 1973 [22 Dec 1972] 58768/73 Heading H3T [Also in Divisions G3 and H2] A control for a D.C. motor M comprises a plurality of power transistors Q1-Q15 each having a current transfer ratio characteristic with a portion decreasing abruptly with increase in collector current, a base drive source DCR for the transistors providing a constant current to cause each transistors to operate on the above mentioned portion, and means for varying the duty cycle of pulses provided by the circuit to the motor. Speed control of the motor is effected by a potentiometer SP which provides a controlling input to a variable delay circuit VDS. This circuit is activated at each output pulse from an oscillator OSC which also sets a bi-stable gating circuit PWM to provide a signal on S1 to cause circuit DCR to activate the switch PS. After the delay interval, a signal from circuit VDS resets the circuit PWM to terminate S1 and thereby the current pulse to the motor. A conduction unit circuit SL in the form of a reciprocally coupled complementary pair (Fig. 8, not shown) senses the voltage across the power transistors and supplies a reset signal over lead CL to circuit PWM if this voltage rises above a certain level indicating that the transistors are pulling out of saturation. Details of circuit DCR are provided, Figs. 2, 3 (not shown), see Division G3. Details of circuits PWM and VDS are given in copending application No. 58769/73. Each power transistor Qi may be replaced by a Darlington pair, and in the event of single transistors being used, they may be of single-diffused silicon type, and the Darington pairs may be of unitary construction of triple diffused silicon type.