GB1441458A - Stored programme data processing for parallel processing of programme segment - Google Patents
Stored programme data processing for parallel processing of programme segmentInfo
- Publication number
- GB1441458A GB1441458A GB2974373A GB2974373A GB1441458A GB 1441458 A GB1441458 A GB 1441458A GB 2974373 A GB2974373 A GB 2974373A GB 2974373 A GB2974373 A GB 2974373A GB 1441458 A GB1441458 A GB 1441458A
- Authority
- GB
- United Kingdom
- Prior art keywords
- segments
- executed
- data processing
- parallel
- programme
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Multi Processors (AREA)
Abstract
1441458 Data processing system TEXAS INSTRUMENTS Inc 22 June 1973 [8 June 1972] 29743/73 Heading G4A A data processing system includes an instruction decoder HLIPU arranged to assign stored program segments to respective ones of a plurality of instruction decoders 11-14 for parallel execution therein. A program to be executed is analysed for parallelism and a table is built up in stores 1-4 specifying the names and store addresses of segments of the program which may be executed in parallel together with lists of segments which must be executed prior to each specified segment. The high level decoder HLIPU 6 assigns executable segments to decoders 12-14 by referring to the table and lists which are updated as appropriate. Decoder 11 is reserved for operating system programs. The segments being executed in parallel are decoded and fed via switching network 19 for execution in units 26- 28.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US26688172A | 1972-06-28 | 1972-06-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1441458A true GB1441458A (en) | 1976-06-30 |
Family
ID=23016366
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2974373A Expired GB1441458A (en) | 1972-06-28 | 1973-06-22 | Stored programme data processing for parallel processing of programme segment |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE2332727A1 (en) |
FR (1) | FR2191776A5 (en) |
GB (1) | GB1441458A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1988002513A1 (en) * | 1986-10-03 | 1988-04-07 | Telefonaktiebolaget L M Ericsson | Method and device to execute two instruction sequences in an order determined in advance |
WO1988002514A1 (en) * | 1986-10-03 | 1988-04-07 | Telefonaktiebolaget L M Ericsson | Method and device to execute two instruction sequences in an order determined in advance |
GB2227108A (en) * | 1989-01-13 | 1990-07-18 | Ibm | Data processing systems |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4825360A (en) * | 1986-07-30 | 1989-04-25 | Symbolics, Inc. | System and method for parallel processing with mostly functional languages |
-
1973
- 1973-06-22 GB GB2974373A patent/GB1441458A/en not_active Expired
- 1973-06-26 FR FR7323322A patent/FR2191776A5/fr not_active Expired
- 1973-06-27 DE DE19732332727 patent/DE2332727A1/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1988002513A1 (en) * | 1986-10-03 | 1988-04-07 | Telefonaktiebolaget L M Ericsson | Method and device to execute two instruction sequences in an order determined in advance |
WO1988002514A1 (en) * | 1986-10-03 | 1988-04-07 | Telefonaktiebolaget L M Ericsson | Method and device to execute two instruction sequences in an order determined in advance |
US4956770A (en) * | 1986-10-03 | 1990-09-11 | Telefonaktiebolaget L M Ericsson | Method and device to execute two instruction sequences in an order determined in advance |
US4985826A (en) * | 1986-10-03 | 1991-01-15 | Telefonaktiebolaget L. M. Ericsson | Method and device to execute two instruction sequences in an order determined in advance |
GB2227108A (en) * | 1989-01-13 | 1990-07-18 | Ibm | Data processing systems |
AU618142B2 (en) * | 1989-01-13 | 1991-12-12 | International Business Machines Corporation | Tightly coupled multiprocessor instruction synchronization |
US5075840A (en) * | 1989-01-13 | 1991-12-24 | International Business Machines Corporation | Tightly coupled multiprocessor instruction synchronization |
Also Published As
Publication number | Publication date |
---|---|
DE2332727A1 (en) | 1974-01-10 |
FR2191776A5 (en) | 1974-02-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |