GB1432661A - Touati r transmission of information - Google Patents

Abstract

1432661 Digital transmission; keyed A.C. calling L CARIEL M LEVY H AOUIZERATE and R TOUATI 23 March 1973 [30 March 1972 26 Jan 1973] 14123/73 Headings H4P and H4L The 0's and 1's of a binary address and a following binary message are transmitted as different length A.C. bursts to a receiver which is selected by the binary address. The different width pulses may be sent at different frequencies F1, F2, Fig. 1, or the same frequency (F, Fig. 6, not shown). The 0's and 1's of the address 9 and message 10 portions of the signal are ¢t and 1t long respectively; a start call signal 1,0 (F2, F1) precedes the address proper 9a, and a start message signal 0, 1 (F1, F2) precedes the message proper 10a; and both portions 9, 10 are concluded by a 1 (F2). A spacing signal 8c at frequency F1 lasts for 2t and a clear signal 8a, 8b at frequency F2 also lasts for 2t. At the receiver the frequencies F1, F2 are separated at 13a, 13b, Fig. 3, and fed to a circuit containing OR gates 15, 21 and AND gates 16, 17. A 0À75t period monostable 19 identifies 1's in the pulse train received, and these are passed to corresponding stages of a shift register 20 which first receives the address portion 9. A decoder 24 recognizes when its own address is received at 20c to 20f and operates an audible alarm 26, provided that an AND gate 23 senses 1's at the beginning and end of the address 9. The long (2t) spacing pulse 8c is detected by a 1À4t monostable 18 and AND gate 16, so as to reset the register at 22. The message is then fed in and decoded at 29 to operate a display 30 such as an alphanumeric device. The clear signal 8b is detected by monostable 18 and AND gate 17 to reset a bi-stable 27 and block at 28 any further output to the decoder 29. In modifications (Figs. 4, 5, not shown) different numbers of decoders and displays are operated from suitably modified shift registers. - An alternative receiver (Fig. 7, not shown) operates with the single frequency (F) transmission but operates generally similarly, and uses monostables and AND gates to separate the 1's and 0's. A schematic transmitter (Fig. 2, not shown) uses separate coding circuits (5, 6, 7) for the clear and space signals 8a, 8b, 8c, the address signals 9, and the message 10.