GB1394158A - Processor controlled telecommunication switching system - Google Patents

Processor controlled telecommunication switching system

Info

Publication number
GB1394158A
GB1394158A GB1071873A GB1071873A GB1394158A GB 1394158 A GB1394158 A GB 1394158A GB 1071873 A GB1071873 A GB 1071873A GB 1071873 A GB1071873 A GB 1071873A GB 1394158 A GB1394158 A GB 1394158A
Authority
GB
United Kingdom
Prior art keywords
connection
processor
status word
status
call
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1071873A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Publication of GB1394158A publication Critical patent/GB1394158A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/5455Multi-processor, parallelism, distributed systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/54558Redundancy, stand-by
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54575Software application
    • H04Q3/54591Supervision, e.g. fault localisation, traffic measurements, avoiding errors, failure recovery, monitoring, statistical analysis

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Monitoring And Testing Of Exchanges (AREA)

Abstract

1394158 Automatic exchange systems INTERNATIONAL STANDARD ELECTRIC CORP 6 March 1973 [6 March 1972] 10718/73 Heading H4K In a processor controlled switching system controlled by at least two processors using a common or duplicate stores storing first status words each indicating the state reached in setting up an associated connection, each processor is arranged upon occurrence of a breakdown in the other of executing a recovery programme which consists of addressing the locations of the first status words in succession, reading the call state as specified in each status word, releasing those calls which have not yet reached the connection stage and for each call in the connection stage to access from store an associated second status word which under normal operation would store the address of the first status word, to compare that address with the address used to access the first status word and in the case of non-identity to release the connection. The arrangement is generally similar to that described in Specification 1,181,184. The first status words are individually associated with corresponding originating junctors and store the identity of the processor handling the call; the connection state reached i.e. idle, dialling, ringing, connection effected and supervision (i.e. one party released but connection not yet released); and have a location for storing the relative address of the associated second status word. The second status words are associated with the terminating junctor circuit and from the moment when that junctor is taken into use store the identity of the processor involved, the type of call (not detailed) and the identity of the associated first status word. The address of the second status word is entered in the associated first status word at this time. The second status word is used to check that the defective processor was working normally when it set up that particular connection. If during the recovery propgramme a first status word indicates that the associated call is in the supervision state then that indication is changed back to the connection state to start again the timing of a period in which the party that has gone on-hook can again lift his receiver to reestablish the connection. The recovery programme is initiated by an external control unit storing that programme on magnetic tape. It may be initiated only when both processors become defective, it being noted that most processor breakdowns are of a temporary nature, the recovery programme being first fed to last processor to become defective and then to the other if it cannot be effected by that processor. A more extensive recovery programme is also provided in the tape unit if the first recovery programme cannot be effected.
GB1071873A 1972-03-06 1973-03-06 Processor controlled telecommunication switching system Expired GB1394158A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7202936A NL7202936A (en) 1972-03-06 1972-03-06

Publications (1)

Publication Number Publication Date
GB1394158A true GB1394158A (en) 1975-05-14

Family

ID=19815519

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1071873A Expired GB1394158A (en) 1972-03-06 1973-03-06 Processor controlled telecommunication switching system

Country Status (10)

Country Link
BE (1) BE796248A (en)
CA (1) CA1019052A (en)
CH (1) CH571797A5 (en)
DE (1) DE2310634C3 (en)
ES (1) ES412364A1 (en)
FR (1) FR2175048B1 (en)
GB (1) GB1394158A (en)
IT (1) IT981134B (en)
NL (1) NL7202936A (en)
YU (1) YU36821B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115086828A (en) * 2022-08-23 2022-09-20 荣耀终端有限公司 Earphone control method and related device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115086828A (en) * 2022-08-23 2022-09-20 荣耀终端有限公司 Earphone control method and related device
CN115086828B (en) * 2022-08-23 2022-12-27 荣耀终端有限公司 Earphone control method and related device

Also Published As

Publication number Publication date
DE2310634B2 (en) 1981-07-09
CH571797A5 (en) 1976-01-15
CA1019052A (en) 1977-10-11
DE2310634C3 (en) 1982-03-25
FR2175048A1 (en) 1973-10-19
BE796248A (en) 1973-09-05
ES412364A1 (en) 1976-01-01
DE2310634A1 (en) 1973-09-20
YU56473A (en) 1981-11-13
NL7202936A (en) 1973-09-10
YU36821B (en) 1984-08-31
IT981134B (en) 1974-10-10
FR2175048B1 (en) 1980-02-22

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Legal Events

Date Code Title Description
PS Patent sealed
746 Register noted 'licences of right' (sect. 46/1977)
PCNP Patent ceased through non-payment of renewal fee