GB1393710A - Binary adders - Google Patents
Binary addersInfo
- Publication number
- GB1393710A GB1393710A GB2198572A GB2198572A GB1393710A GB 1393710 A GB1393710 A GB 1393710A GB 2198572 A GB2198572 A GB 2198572A GB 2198572 A GB2198572 A GB 2198572A GB 1393710 A GB1393710 A GB 1393710A
- Authority
- GB
- United Kingdom
- Prior art keywords
- produce
- carry
- comparators
- binary adders
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/48—Indexing scheme relating to groups G06F7/48 - G06F7/575
- G06F2207/4802—Special implementations
- G06F2207/4814—Non-logic devices, e.g. operational amplifiers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Manipulation Of Pulses (AREA)
- Analogue/Digital Conversion (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16322571A | 1971-07-16 | 1971-07-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1393710A true GB1393710A (en) | 1975-05-14 |
Family
ID=22589015
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB2198572A Expired GB1393710A (en) | 1971-07-16 | 1972-05-10 | Binary adders |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US3728531A (cg-RX-API-DMAC7.html) |
| JP (1) | JPS5524135B1 (cg-RX-API-DMAC7.html) |
| AU (1) | AU459591B2 (cg-RX-API-DMAC7.html) |
| CA (1) | CA969281A (cg-RX-API-DMAC7.html) |
| DE (1) | DE2234906A1 (cg-RX-API-DMAC7.html) |
| FR (1) | FR2146721A5 (cg-RX-API-DMAC7.html) |
| GB (1) | GB1393710A (cg-RX-API-DMAC7.html) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0628503A (ja) * | 1992-05-15 | 1994-02-04 | Takayama:Kk | 加算器 |
| US10514911B2 (en) | 2014-11-26 | 2019-12-24 | International Business Machines Corporation | Structure for microprocessor including arithmetic logic units and an efficiency logic unit |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| BE491594A (cg-RX-API-DMAC7.html) * | 1948-10-13 | |||
| US3586845A (en) * | 1966-09-13 | 1971-06-22 | Agency Ind Science Techn | Binary full adder utilizing operational amplifiers |
| US3534404A (en) * | 1967-06-29 | 1970-10-13 | Sperry Rand Corp | Carry and comparator networks for multi-input majority logic elements |
| US3609329A (en) * | 1969-05-05 | 1971-09-28 | Shell Oil Co | Threshold logic for integrated full adder and the like |
-
1971
- 1971-07-16 US US00163225A patent/US3728531A/en not_active Expired - Lifetime
-
1972
- 1972-05-09 CA CA141,714A patent/CA969281A/en not_active Expired
- 1972-05-10 GB GB2198572A patent/GB1393710A/en not_active Expired
- 1972-05-12 AU AU42204/72A patent/AU459591B2/en not_active Expired
- 1972-05-19 JP JP4922472A patent/JPS5524135B1/ja active Pending
- 1972-06-19 FR FR7222008A patent/FR2146721A5/fr not_active Expired
- 1972-07-15 DE DE2234906A patent/DE2234906A1/de active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE2234906A1 (de) | 1973-01-25 |
| JPS5524135B1 (cg-RX-API-DMAC7.html) | 1980-06-27 |
| US3728531A (en) | 1973-04-17 |
| AU459591B2 (en) | 1975-03-27 |
| FR2146721A5 (cg-RX-API-DMAC7.html) | 1973-03-02 |
| CA969281A (en) | 1975-06-10 |
| AU4220472A (en) | 1973-11-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| GB1463420A (en) | Multiplication apparatus | |
| GB1513103A (en) | Modulo m adder | |
| GB1390388A (en) | Microprogramme computer | |
| AU589982B2 (en) | Circuitry for complementing binary numbers | |
| GB1433834A (en) | Binary divider | |
| GB1531919A (en) | Arithmetic units | |
| GB926260A (en) | Improved floating point arithmetic circuit | |
| GB1206008A (en) | Logic circuit | |
| FR2356995A1 (fr) | Unite logique fonctionnelle | |
| Flynn | Lynn, the Japanese, and environmentalism. | |
| GB1365783A (en) | Addition subtraction device utilizing memory means | |
| GB1390428A (en) | Binary-decimal adder for digital computers | |
| GB1484149A (en) | Decimal parallel adder | |
| ES404903A1 (es) | Dispositivo para la propagacion de dominios magneticos. | |
| GB1052400A (cg-RX-API-DMAC7.html) | ||
| GB1079836A (en) | Improvements in or relating to binary information transmission systems | |
| GB1514320A (en) | Number processing apparatus | |
| GB981922A (en) | Data processing apparatus | |
| GB1145676A (en) | High speed adder circuit | |
| GB1203730A (en) | Binary arithmetic unit | |
| MY100614A (en) | A multibit digital thereshold comparator | |
| GB1140760A (en) | Logic circuit producing an analog signal corresponding to an additive combination ofdigital signals | |
| GB1424080A (en) | Full adder and subtractor circuit | |
| GB1135108A (en) | Binary digital circuits | |
| GB1420787A (en) | Electronic binary checking circuit injectable preparations |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PCNP | Patent ceased through non-payment of renewal fee |