GB1363800A - Multiplexor - Google Patents

Multiplexor

Info

Publication number
GB1363800A
GB1363800A GB5924972A GB5924972A GB1363800A GB 1363800 A GB1363800 A GB 1363800A GB 5924972 A GB5924972 A GB 5924972A GB 5924972 A GB5924972 A GB 5924972A GB 1363800 A GB1363800 A GB 1363800A
Authority
GB
United Kingdom
Prior art keywords
parity
incorrect
signal
multiplexor
selection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5924972A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1363800A publication Critical patent/GB1363800A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/14—Monitoring arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L2001/0092—Error control systems characterised by the topology of the transmission link
    • H04L2001/0094—Bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

1363800 Digital transmission; multiplexing INTERNATIONAL BUSINESS MACHINES CORP 21 Dec 1972 [31 Jan 1972] 59249/72 Heading H4P In a multiplexor having input data channels and separate parity busses, to provide an error signal when an incorrect channel is selected, a modified parity signal is provided by an exclusive OR operation, the OR gate receiving a selection signal from a distributer 2 responsive to instruction signals to the multiplexor and a parity signal corresponding to the channel. By this means incorrect selection causes an error signal even when data is in error. A truth table is given in Fig. 1B (not shown). Double errors, i.e. incorrect parity and selection are not detected but the probability is assumed to be low.
GB5924972A 1972-01-31 1972-12-21 Multiplexor Expired GB1363800A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19722204349 DE2204349C3 (en) 1972-01-31 1972-01-31 Method and circuit arrangement for combined data and selection error detection in a selection switch

Publications (1)

Publication Number Publication Date
GB1363800A true GB1363800A (en) 1974-08-14

Family

ID=5834494

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5924972A Expired GB1363800A (en) 1972-01-31 1972-12-21 Multiplexor

Country Status (4)

Country Link
JP (1) JPS5441189B2 (en)
DE (1) DE2204349C3 (en)
FR (1) FR2169934B1 (en)
GB (1) GB1363800A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3775018D1 (en) * 1986-12-05 1992-01-16 Siemens Nixdorf Inf Syst METHOD AND ARRANGEMENT FOR DETECTING AND SIGNALING DEFECTIVE, DATA-MULTIPLEX-CONTROLLING CONTROL SIGNALS IN INTEGRATED CIRCUIT COMPONENTS.
JPH05204683A (en) * 1992-01-29 1993-08-13 Nec Corp Failure detecting circuit

Also Published As

Publication number Publication date
DE2204349A1 (en) 1973-08-09
DE2204349B2 (en) 1978-03-09
FR2169934B1 (en) 1978-05-12
JPS4887747A (en) 1973-11-17
FR2169934A1 (en) 1973-09-14
JPS5441189B2 (en) 1979-12-07
DE2204349C3 (en) 1978-10-26

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee