GB1341852A - Performance checking and measuring devices and methods for signal channels - Google Patents

Performance checking and measuring devices and methods for signal channels

Info

Publication number
GB1341852A
GB1341852A GB1341852DA GB1341852A GB 1341852 A GB1341852 A GB 1341852A GB 1341852D A GB1341852D A GB 1341852DA GB 1341852 A GB1341852 A GB 1341852A
Authority
GB
United Kingdom
Prior art keywords
output
integrator
average
peak
clock pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marconi Instruments Ltd
Original Assignee
Marconi Instruments Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marconi Instruments Ltd filed Critical Marconi Instruments Ltd
Publication of GB1341852A publication Critical patent/GB1341852A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/46Monitoring; Testing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/04Measuring peak values or amplitude or envelope of ac or of pulses

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

1341852 Measuring peak/average ratio MARCONI INSTRUMENTS Ltd 19 April 1971 [26 March 1970] 14714/70 Headings G1U A pulse train Fig. 6 having a mark/space ratio proportional to (V peak /V average - 1) where V peak is the peak voltage, and V average is the average voltage, of an input waveform 1, Fig.1, is produced by detecting both the peak and average voltages by diode-capacitor detectors 2, 3 by applying the peak voltage to an integrator 6 for the duration T 1 of a positive clock pulse, Fig.2, applied to a terminal 17, to produce a negative going voltage Fig.4, at the integrator output, then applying the average voltage to the integrator 6 until its output becomes zero, and then producing a pulse in the output pulse train Fig.6, which lasts from the instant the integrator output Fig.4, becomes zero to the beginning of the next positive clock pulse, Fig.2, whereupon the whole process repeats. The clock pulses Fig.2, are applied via a terminal 17 directly to a switch 7 and via an inverter 18 and a gate 16 to a switch 8. For the duration of a positive clock pulse switch 7 is opened and the peak voltage is applied to the integrator. Its output is applied to a sign detector 10, which, since the integrator output starts from zero and proceeds negatively, Fig.4, produces a positive output. This positive output tends to open gate 16 but has no effect since the inverted clock pulse applied to it is negative. At the end of the positive clock pulse switch 7 closes, and gate 16 opens to open switch 8. The average voltage is now applied to the integrator, whose output now rises. When it reaches zero, the output of the sign detector 10 changes to negative thereby closing gate 16 and removing the average voltage from the input of the integrator. The output of the sign detector 10 is also applied via an inverter 12 and a gate 14 - which is open since a negative clock pulse is present on terminal 17 - to produce an output pulse, Fig.6, on a terminal 21 lasting until the next positive clock pulse arrives. It can be shown that the mark/space ratio of the resulting pulse train Fig.6, is as stated above, and it may be displayed on an average reading meter.
GB1341852D 1970-03-26 1970-03-26 Performance checking and measuring devices and methods for signal channels Expired GB1341852A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1471470 1970-03-26

Publications (1)

Publication Number Publication Date
GB1341852A true GB1341852A (en) 1973-12-25

Family

ID=10046208

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1341852D Expired GB1341852A (en) 1970-03-26 1970-03-26 Performance checking and measuring devices and methods for signal channels

Country Status (2)

Country Link
GB (1) GB1341852A (en)
SE (1) SE366593B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2223856A (en) * 1988-10-17 1990-04-18 Zion Educational Found Pulse generation and tracking system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2223856A (en) * 1988-10-17 1990-04-18 Zion Educational Found Pulse generation and tracking system
GB2223856B (en) * 1988-10-17 1993-01-06 Zion Educational Found Pulse generation and tracking system

Also Published As

Publication number Publication date
SE366593B (en) 1974-04-29

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee