GB1332346A - Data processing systems - Google Patents

Data processing systems

Info

Publication number
GB1332346A
GB1332346A GB5263670A GB5263670A GB1332346A GB 1332346 A GB1332346 A GB 1332346A GB 5263670 A GB5263670 A GB 5263670A GB 5263670 A GB5263670 A GB 5263670A GB 1332346 A GB1332346 A GB 1332346A
Authority
GB
United Kingdom
Prior art keywords
terminal
bit
channel
nov
programs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5263670A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Burroughs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Burroughs Corp filed Critical Burroughs Corp
Publication of GB1332346A publication Critical patent/GB1332346A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q40/00—Finance; Insurance; Tax strategies; Processing of corporate or income taxes
    • G06Q40/02—Banking, e.g. interest calculation or account maintenance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol

Abstract

1332346 Telegraphy; speed changing BURROUGHS CORP 5 Nov 1970 [19 Nov 1969 (2)] 52636/70 Heading H4P [Also in Division G4] A real time on-line data processing terminal arranged for connection via a communication channel with a central data processor includes a timing means for maintaining a predetermined relationship between the communication rate of the channel and the rate of operation of the terminal. The specification describes the terminal in some detail. Briefly the terminal includes a keyboard for entering data and programs a record controlled input device e.g. magnetic or punched tape devices, for entering programs, and a printer and communicates with the central data processor over, e.g. low grade telephone lines. The system is said to be for use in banks, the terminal being operable on or off-line from the central processor. Transmission over the channel are serial in seven bit ASCII plus one parity bit. Receive and transmit buffers, e.g. recirculating shift registers, being provided for assembling complete words at the terminal. Pointer registers, e.g. further recirculating shift registers are provided to identify the buffer bit positions from which or to which the next bit is to be transmitted or received. The timing circuit includes a crystal clock, pulse shaping arrangements and a frequency divider comprising a shift register. The terminal includes a memory which may be a disc store.
GB5263670A 1969-11-19 1970-11-05 Data processing systems Expired GB1332346A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US87807269A 1969-11-19 1969-11-19
US87807369A 1969-11-19 1969-11-19

Publications (1)

Publication Number Publication Date
GB1332346A true GB1332346A (en) 1973-10-03

Family

ID=27128471

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5263670A Expired GB1332346A (en) 1969-11-19 1970-11-05 Data processing systems

Country Status (3)

Country Link
BE (1) BE758536A (en)
FR (1) FR2069701A5 (en)
GB (1) GB1332346A (en)

Also Published As

Publication number Publication date
FR2069701A5 (en) 1971-09-03
BE758536A (en) 1971-04-16

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Legal Events

Date Code Title Description
PS Patent sealed
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee