GB1317844A - Apparatus for compensating the impedance of an electrical line - Google Patents

Abstract

1317844 Automatic exchange apparatus COMPAGNIE INDUSTRIELLE DES TELECOMMUNICATIONS CIT ALCATEL 19 April 1971 [6 March 1970] 23359/71 Heading H4K In an asymmetrical D.C. signalling system a bridge circuit automatically switches resistance into a calling loop until the loop current lies within an acceptable range, a magnetic amplifier being biased by the loop current and counterbiased by current from a control circuit which effects the selective operation of relays C1, C2, C4, until the loop current is adjusted. The relays C1, C2, C4 have self holding contacts and bridge one, two, and four units of resistance a connected in the loop. A magnetic amplifier MC has bias windings mcp in each leg of the loop and a counter-bias winding mcn fed over resistor R3, or over R3 in parallel with R4, or both these in parallel with R5 depending on the operation of delay circuits TE1, TE2, and TE3 in that order and following operation of contacts MM when the bridge circuit is seized by the line. An output maturing from delay circuits TE1, TE2, TE4 will operate the corresponding balancing resistor relays C4, C2, or C1 provided that the gates P1, P2, and P3 are not disabled from the magnetic amplifier MC and have not been disabled by subsequently maturing delay circuits over diodes D4, D5. The magnetic amplifier enables the gates when the counterbias on windings mcn is insufficient to exceed the bias plus a threshold sufficient to take the amplifier into output. The output of MC is delayed at TE4 before being applied to the gates P1, P2, and P3, as an inhibition. If the initial loop current, with all seven units of resistance a in circuit, is sufficient to bias MC against the counter-bias of R3 and drives MC into output, subsequent applications of further counter bias from R4 and R5 being insufficient to cut-off the output from MC, then none of the relays C1, C2, C4, is operated and the loop is undisturbed. If the additional counter-bias introduced by R5, when TE3 times out, is sufficient to withdraw MC below its cut-off point, gate P3 opens and relay C1 operates to withdraw a unit of resistance a from the loop. The consequent increase in loop current increases the bias and shifts MC back into output. If the additional counter-bias introduced by R4, when TE2 times out, causes MC to cut-off, gate P2 opens and relay C2 is operated to withdraw two units of resistance a from the loop. The increase of loop current may put MC back into its output state from which it may be withdrawn once more when TE3 times out to switch R5 into the counter-bias circuit. If R5 cuts off MC, relay C1 is operated to join C2 and withdraw a further unit of resistance a. If R5 does not cut-off MC, C2 alone stays operated. If the initial current in the loop is insufficient to move MC into output against the counter-bias of R3, timing out of TE1 causes C4 to operate and withdraw four units of resistance a from the loop. If this is insufficient to drive MC into output in response to the increased loop current, timing out of TE2 operates C2 to withdraw two more units of resistance a. Similarly, timing out of TE3 will operate C3 to withdraw one more unit if C2 also fails to push MC into output. If, however, operation of C4 had caused MC to produce output, and subsequent introduction of R4 into the counter-bias circuit does not cut MC off, introduction of R5 can cut MC off and cause C1 to join C4. If the introduction of R5 also fails to cut-off MC, C4 will stay operated on its own. By this means an appropriate one of the seven possible values of resistance units a is put into the loop in accordance with the initial loop current detected by MC.