GB1288564A - - Google Patents

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Publication number
GB1288564A
GB1288564A GB429669A GB1288564DA GB1288564A GB 1288564 A GB1288564 A GB 1288564A GB 429669 A GB429669 A GB 429669A GB 1288564D A GB1288564D A GB 1288564DA GB 1288564 A GB1288564 A GB 1288564A
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Prior art keywords
pips
gold
bonding
silicon
layer
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GB429669A
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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  • Engineering & Computer Science (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

1288564 Semi-conductor devices NATIONAL RESEARCH DEVELOPMENT CORP 27 Jan 1970 [24 Jan 1969] 4296/69 Heading H1K The contact system for a flip-chip semiconductor device includes a film which connects contacts on semi-conductor regions to raised bonding pips. A lower chromium layer in the film adheres well to passivation on the semiconductor and merges with an upper, gold layer which carries the bulk of the operating current of the device. The section of Fig. 7B is along line AB of Fig. 8 and does not show the enhanced conductivity region and contact 6 associated with the collector region of the illustrated transistor. The silicon planar has silicon oxide or double layer silicon oxide-silicon nitride passivation 3 through apertures in which contact is made to the silicon by metal layers 16 of aluminium or of molybdenum. The superposed layers of the film are deposited overall, and the gold layer then etched to the shapes 7, 8, 9 of the interconnection pattern with a solution of I 2 /KI. The bonding pips 11 are then formed by electroplating and as shown consist of a main body of silver with a further deposit 12 of tin to act as a solder when the transistor is bonded to a substrate. The chromium layer 13 is then also selectively etched to the shape of the interconnection pattern using a solution of NaOH/ KMnO 4 . During processing the chromium and gold layers are partially merged by a sintering step at 200-300‹ C. Alternative metals for the conductor pips are nickel, lead, copper, gold (when thermocompression bonding is to be used) and uncoated silver (when ultrasonic bonding is to be used). Devices in integrated circuits may have some conductive pips in common. Further conductive pips, not acting as contacts, may be present to give mechanical stability to a devicesubstrate assembly.
GB429669A 1969-01-24 1969-01-24 Expired GB1288564A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB429669 1969-01-24

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GB1288564A true GB1288564A (en) 1972-09-13

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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2383522A1 (en) * 1977-03-08 1978-10-06 Ates Componenti Elettron PROCESS FOR FORMING METALLIZED ZONES ON A SERIES OF SEMICONDUCTOR DEVICES
US4216488A (en) * 1978-07-31 1980-08-05 Hutson Jearld L Lateral semiconductor diac
GB2157079A (en) * 1984-03-30 1985-10-16 Mitsubishi Electric Corp Electrode arrangement for semiconductor devices
WO1996031905A1 (en) * 1995-04-05 1996-10-10 Mcnc A solder bump structure for a microelectronic substrate
US6388203B1 (en) 1995-04-04 2002-05-14 Unitive International Limited Controlled-shaped solder reservoirs for increasing the volume of solder bumps, and structures formed thereby
US7659621B2 (en) 2003-10-14 2010-02-09 Unitive International Limited Solder structures for out of plane connections
US7674701B2 (en) 2006-02-08 2010-03-09 Amkor Technology, Inc. Methods of forming metal layers using multi-layer lift-off patterns
US7839000B2 (en) 2002-06-25 2010-11-23 Unitive International Limited Solder structures including barrier layers with nickel and/or copper
US7879715B2 (en) 2002-06-25 2011-02-01 Unitive International Limited Methods of forming electronic structures including conductive shunt layers and related structures
US7932615B2 (en) 2006-02-08 2011-04-26 Amkor Technology, Inc. Electronic devices including solder bumps on compliant dielectric layers

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2383522A1 (en) * 1977-03-08 1978-10-06 Ates Componenti Elettron PROCESS FOR FORMING METALLIZED ZONES ON A SERIES OF SEMICONDUCTOR DEVICES
US4216488A (en) * 1978-07-31 1980-08-05 Hutson Jearld L Lateral semiconductor diac
GB2157079A (en) * 1984-03-30 1985-10-16 Mitsubishi Electric Corp Electrode arrangement for semiconductor devices
US4709469A (en) * 1984-03-30 1987-12-01 Mitsubishi Denki Kabushiki Kaisha Method of making a bipolar transistor with polycrystalline contacts
US6388203B1 (en) 1995-04-04 2002-05-14 Unitive International Limited Controlled-shaped solder reservoirs for increasing the volume of solder bumps, and structures formed thereby
US6392163B1 (en) 1995-04-04 2002-05-21 Unitive International Limited Controlled-shaped solder reservoirs for increasing the volume of solder bumps
WO1996031905A1 (en) * 1995-04-05 1996-10-10 Mcnc A solder bump structure for a microelectronic substrate
US6329608B1 (en) 1995-04-05 2001-12-11 Unitive International Limited Key-shaped solder bumps and under bump metallurgy
US5892179A (en) * 1995-04-05 1999-04-06 Mcnc Solder bumps and structures for integrated redistribution routing conductors
US6389691B1 (en) 1995-04-05 2002-05-21 Unitive International Limited Methods for forming integrated redistribution routing conductors and solder bumps
US7839000B2 (en) 2002-06-25 2010-11-23 Unitive International Limited Solder structures including barrier layers with nickel and/or copper
US7879715B2 (en) 2002-06-25 2011-02-01 Unitive International Limited Methods of forming electronic structures including conductive shunt layers and related structures
US8294269B2 (en) 2002-06-25 2012-10-23 Unitive International Electronic structures including conductive layers comprising copper and having a thickness of at least 0.5 micrometers
US7659621B2 (en) 2003-10-14 2010-02-09 Unitive International Limited Solder structures for out of plane connections
US7674701B2 (en) 2006-02-08 2010-03-09 Amkor Technology, Inc. Methods of forming metal layers using multi-layer lift-off patterns
US7932615B2 (en) 2006-02-08 2011-04-26 Amkor Technology, Inc. Electronic devices including solder bumps on compliant dielectric layers

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