GB1285956A - Binary information storage apparatus - Google Patents
Binary information storage apparatusInfo
- Publication number
- GB1285956A GB1285956A GB42607/69A GB4260769A GB1285956A GB 1285956 A GB1285956 A GB 1285956A GB 42607/69 A GB42607/69 A GB 42607/69A GB 4260769 A GB4260769 A GB 4260769A GB 1285956 A GB1285956 A GB 1285956A
- Authority
- GB
- United Kingdom
- Prior art keywords
- transistors
- transistor
- diodes
- line
- digit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/012—Modifications of generator to improve response time or to decrease power consumption
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/415—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/416—Read-write [R-W] circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/013—Modifications of generator to prevent operation by noise or interference
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/10—SRAM devices comprising bipolar components
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/139—Schottky barrier
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US75559068A | 1968-08-27 | 1968-08-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1285956A true GB1285956A (en) | 1972-08-16 |
Family
ID=25039788
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB42607/69A Expired GB1285956A (en) | 1968-08-27 | 1969-08-27 | Binary information storage apparatus |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US3540010A (enExample) |
| JP (1) | JPS5545994B1 (enExample) |
| BE (1) | BE737933A (enExample) |
| DE (1) | DE1942559B2 (enExample) |
| FR (1) | FR2016450A1 (enExample) |
| GB (1) | GB1285956A (enExample) |
| NL (1) | NL6913011A (enExample) |
| SE (1) | SE367084B (enExample) |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3680061A (en) * | 1970-04-30 | 1972-07-25 | Ncr Co | Integrated circuit bipolar random access memory system with low stand-by power consumption |
| CH519251A (de) * | 1970-07-01 | 1972-02-15 | Ibm | Integrierte Halbleiterschaltung zur Speicherung von Daten |
| US3680055A (en) * | 1970-07-06 | 1972-07-25 | Burroughs Corp | Buffer memory having read and write address comparison for indicating occupancy |
| US3723837A (en) * | 1970-09-22 | 1973-03-27 | Ibm | Resistor bed structure for monolithic memory |
| US3710207A (en) * | 1971-03-30 | 1973-01-09 | Ibm | Positional dependency monolithic impedance |
| US3849675A (en) * | 1973-01-05 | 1974-11-19 | Bell Telephone Labor Inc | Low power flip-flop circuits |
| FR2304991A1 (fr) * | 1975-03-15 | 1976-10-15 | Ibm | Agencement de circuits pour memoire semi-conductrice et son procede de fonctionnement |
| US4021786A (en) * | 1975-10-30 | 1977-05-03 | Fairchild Camera And Instrument Corporation | Memory cell circuit and semiconductor structure therefore |
| DE2855866C3 (de) * | 1978-12-22 | 1981-10-29 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren und Schaltungsanordnung zum Betreiben eines integrierten Halbleiterspeichers |
| DE2926094A1 (de) * | 1979-06-28 | 1981-01-08 | Ibm Deutschland | Verfahren und schaltungsanordnung zum entladen von bitleitungskapazitaeten eines integrierten halbleiterspeichers |
| DE2926050C2 (de) * | 1979-06-28 | 1981-10-01 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren und Schaltungsanordnung zum Lesen Und/oder Schreiben eines integrierten Halbleiterspeichers mit Speicherzellen in MTL-Technik |
| DE2929384C2 (de) * | 1979-07-20 | 1981-07-30 | Ibm Deutschland Gmbh, 7000 Stuttgart | Nachladeschaltung für einen Halbleiterspeicher |
| US4302823A (en) * | 1979-12-27 | 1981-11-24 | International Business Machines Corp. | Differential charge sensing system |
| JPS5786390A (en) * | 1980-11-19 | 1982-05-29 | Sanyo Electric Co | Hydroextracting washing machine |
| US4532609A (en) * | 1982-06-15 | 1985-07-30 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor memory device |
| JPS61123168A (ja) * | 1984-11-20 | 1986-06-11 | Fujitsu Ltd | 半導体記憶装置 |
| US4675846A (en) * | 1984-12-17 | 1987-06-23 | International Business Machines Corporation | Random access memory |
| US6794915B2 (en) * | 2000-11-10 | 2004-09-21 | Leonid B. Goldgeisser | MOS latch with three stable operating points |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3067336A (en) * | 1957-05-03 | 1962-12-04 | Honeywell Regulator Co | Bistable electronic switching circuitry for manipulating digital data |
| US2939969A (en) * | 1959-04-07 | 1960-06-07 | Gen Precision Inc | Time delay circuit |
| US3177374A (en) * | 1961-03-10 | 1965-04-06 | Philco Corp | Binary data transfer circuit |
| NL298196A (enExample) * | 1962-09-22 | |||
| US3421026A (en) * | 1964-06-29 | 1969-01-07 | Gen Electric | Memory flip-flop |
| US3394356A (en) * | 1965-04-19 | 1968-07-23 | Ibm | Random access memories employing threshold type devices |
| US3490007A (en) * | 1965-12-24 | 1970-01-13 | Nippon Electric Co | Associative memory elements using field-effect transistors |
-
1968
- 1968-08-27 US US755590A patent/US3540010A/en not_active Expired - Lifetime
-
1969
- 1969-08-21 DE DE19691942559 patent/DE1942559B2/de not_active Ceased
- 1969-08-25 BE BE737933D patent/BE737933A/xx not_active IP Right Cessation
- 1969-08-26 FR FR6929216A patent/FR2016450A1/fr not_active Withdrawn
- 1969-08-26 NL NL6913011A patent/NL6913011A/xx unknown
- 1969-08-26 SE SE11807/69A patent/SE367084B/xx unknown
- 1969-08-27 JP JP6727969A patent/JPS5545994B1/ja active Pending
- 1969-08-27 GB GB42607/69A patent/GB1285956A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| SE367084B (enExample) | 1974-05-13 |
| JPS5545994B1 (enExample) | 1980-11-20 |
| DE1942559B2 (de) | 1972-10-12 |
| DE1942559A1 (de) | 1970-03-05 |
| FR2016450A1 (enExample) | 1970-05-08 |
| BE737933A (enExample) | 1970-02-02 |
| NL6913011A (enExample) | 1970-03-03 |
| US3540010A (en) | 1970-11-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PCNP | Patent ceased through non-payment of renewal fee |