GB1282744A - Improvements in or relating to data sets employing active filters - Google Patents

Abstract

1282744 FSK Systems BURROUGHS CORP 3 Dec 1969 [11 Dec 1968 (2)] 59004/69 Heading H4P A F.S.K. system has a transformer interposed between an incoming line and a receiver which has a plurality of inductorless multiple feedback RC filters each with an amplifier as an active element, and a second harmonic of mark frequency rejection filter in series with further filters including a pair of low pass filters of similar configuration to the R.C. filters. The receiver may have bandwidth selection means for setting the frequency range, distinct voltage levels differentiating between mark and space signals being identified with each selected range. A frequency shift telegraph system in which one of two frequencies are transmitted representative of "0" or "1", and in which for transmission at 1200 baud, the frequencies are more widely spaced than for transmissions at 600 baud comprises at the transmitter a voltage control unit 24 responsive to the input levels from a processor 12 controlling the frequency of a square wave oscillator 18 the output from which is halved by a J.K flip flop, amplified at 34 and passed through a high pass third harmonic rejection filter 38 and low pass filter 40 which limit the transmitted signal spectrum. A voltage control 24 includes transistors (46, 48) Fig. 2 (not shown), having their bases connected through NAND gates 43-45 to the processor output and a switch 42 supplying a zero or positive voltage in dependence on whether transmission of 600bd or 1200bd is required. The output of transistors 46, 48 is low for mark, medium (600bd) or high (1200bd) for space which controls the frequency of a stable multivibrator including transistors 64, 66. Diodes 60, 62 protect the base emitter junctions and are reverse biased during transistor conduction but forward biased during discharge of capacitors 68, 70 which reverse biases diodes 70, 72, 74. Preferably transistors 46, 48 are not both off simultaneously. The output from oscillator 18 is amplified in transistor 76 divided by 2 in a J.K. flip flop 30 and is further amplified and shaped at 34 the output from which is passed through a third harmonic rejection filter 38 and low pass filter 40 having controlled gain, an amplifier and multiple feedback R.C. network replacing the inductive components normally associated with low pass filters, with multiple feedback R.C. loops. The amplifier has provision for gain control. The amplifier output is passed to a transformer 36 for transmission over telephone lines through impedance matching resistors 80, 82. At the receiver a similar transformer passes the signals through an attenuator 86, and a band pass filter 88 comprising individual high and low pass filters to a zero crossing detector circuit 98 where the sine wave input is converted into a series of square waves coincident with each zero crossing this being arranged so the output pulses do not have fast rise and fall times. A feedback network (104) limits the output into a squarer circuit 106 which includes a fast switching amplifier improving the rise and fall times of the pulses from circuit 98. The squarer also halves the frequency input which is passed through a differentiator 112 bringing it back to the original frequency which is passed through a full wave rectifier circuit 114 supplying a double frequency negative output which is inverted and amplified in buffer 124 controlling a monostable multivibrator 126 or a multivibrator timing system. Monostable circuit 126 has two outputs one being passed through an integrator 132 and slicing circuit 136 to a detector which indicates whether any carrier signal is being passed to the receiver, and the second to another integrator 138 through a low pass filter 140 having amplifiers (141) (143) on either side of a twin T rejection filter 144 through another slicing circuit 146 which delivers its output to a central processor. The band filter 88 comprises high and low pass filters (90, 92) which include amplifiers (94, 96) with appropriate feedback circuits the output from which is passed through amplifiers (102, 108, 124) and multivibrator (126) to an integrator (132) which provides a ramp voltage signal also a delay of 10m.sec. the output from which is further amplified at (134) before being passed to the signal detector. The output from monostable flip flop (126) is passed through a transistor (130) into another CR intergrating circuit (138) the output from which is a D.C. bias having a ramp signal superimposed thereon which is passed into a multiple feedback low pass RC active filter and amplifier circuits (140, 142) on each side of a twin T rejection filter (144) (see Fig. 4, not shown). The output of filter 142 is a direct current directly proportional to the frequency of received signal i.e. low frequncy, low amplitude D.C. which is passed through a non-inverting amplifier (152) also having an input from a bandwidth selecting circuit including transistor (148) which is conducting when a selector 16, Fig. 1 is set at 600bd and non conducting at 1200bd. The output from amplifier 152 is passed to a central processor 12.