GB1282556A - Improvements in or relating to electrical circuits - Google Patents

Improvements in or relating to electrical circuits

Info

Publication number
GB1282556A
GB1282556A GB3973968A GB3973968A GB1282556A GB 1282556 A GB1282556 A GB 1282556A GB 3973968 A GB3973968 A GB 3973968A GB 3973968 A GB3973968 A GB 3973968A GB 1282556 A GB1282556 A GB 1282556A
Authority
GB
United Kingdom
Prior art keywords
pulses
stable
frequency
stages
transfer pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3973968A
Inventor
Michael John Rogers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Smiths Group PLC
Original Assignee
Smiths Group PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Smiths Group PLC filed Critical Smiths Group PLC
Priority to GB3973968A priority Critical patent/GB1282556A/en
Publication of GB1282556A publication Critical patent/GB1282556A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers

Landscapes

  • Manipulation Of Pulses (AREA)

Abstract

1282556 Frequency dividers SMITHS INDUSTRIES Ltd 13 Aug 1969 [20 Aug 1968] 39739/68 Heading G4A A frequency-divider, especially for use in clocks, comprises a number of binary stages arranged in cascade but with all these stages receiving ring-type clock pulses from a common transfer pulse generator. High-frequency pulses S feed bi-stable 1 to produce pulses P which feed bi-stable 2 in the transfer pulse generator to produce clock pulses Q which are applied to all subsequent stages. Anti-phase pulses Q are divided by two at 3, the resulting transfer pulses being applied to bistable 4 and AND gate 5. The spacing of output pulses T from bi-stable 4 in respect of pulses P is therefore 2, 3, 3 repeated, coincidence of T and each transfer pulse in gate 5 producing an output U of one pulse for each 8 P pulses. The next stage 6, 7 and all subsequent stages divide by two.
GB3973968A 1968-08-20 1968-08-20 Improvements in or relating to electrical circuits Expired GB1282556A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB3973968A GB1282556A (en) 1968-08-20 1968-08-20 Improvements in or relating to electrical circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3973968A GB1282556A (en) 1968-08-20 1968-08-20 Improvements in or relating to electrical circuits

Publications (1)

Publication Number Publication Date
GB1282556A true GB1282556A (en) 1972-07-19

Family

ID=10411201

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3973968A Expired GB1282556A (en) 1968-08-20 1968-08-20 Improvements in or relating to electrical circuits

Country Status (1)

Country Link
GB (1) GB1282556A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2300942A (en) * 1995-05-15 1996-11-20 Hyundai Electronics Ind High-speed counter circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2300942A (en) * 1995-05-15 1996-11-20 Hyundai Electronics Ind High-speed counter circuit
GB2300942B (en) * 1995-05-15 1999-03-24 Hyundai Electronics Ind High-speed counter circuit

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees