GB1254800A - Improvements in or relating to binary to decimal conversion - Google Patents

Abstract

1,254,800. Binary coded decimal conversion. TELEFONAKTIEBOLAGET L. M. ERICSSON. 19 Dec., 1969 [20 Dec., 1968], No. 62101/69. Heading G4A. The invention relates to a binary to binary coded decimal conversion. Binary data is converted to b.c.d. by effectively dividing by 10 or by multiplying by 1/10 which is recurring number in binary notation. To produce an approximation to 1/10 a number is multiplied by 3 then 17, 257, 65,537 i.e. successively by 3 and then (2<SP>2n-1</SP> + 1) with n#3. Data in a register RA is passed to an adderregister A1 where 1 is added. The data is passed to an adder register and is shifted one place and added to itself to produce multiplication by 3. It is passed to A3 to produce multiplication by 17, to A4 producing multiplication by 257 and to A5 producing multiplication by 65,537. Each adder-register An is effectively 2<SP>n-1</SP> stages longer than the preceding adder-register, the extra stages of A5 not being shown since they are not required. If a p-bit number is being converted (16 bit as shown) the p-3 most significant bits in A5 are examined by comparator circuit J. If they are not zero they are returned to register RA to be remultiplied. The remaining 4 bits are passed to register-adder A6 where they are multiplied by 5 and the four most significant bits of A6 are passed to a register RB1-RB5. This number represents the remainder of the number in RA when divided by 10 and hence represents the least significant decimal digit of the number in RA. The remainders are successively entered in the registers RB1-RB5 until the p-3 most significant bits of A5 are zero indicating that the process is complete. The addition of 1 in A1 and the multiplication of 5 in A6 are found to be necessary to correct errors in the approximation.