GB1242872A - Pulse generator - Google Patents

Abstract

1,242,872. Mono-stable circuit; frequency and phase detectors. STANDARD TELEPHONES & CABLES Ltd. 14 Nov., 1968, No. 53998/68. Headings H3A and H3T. A circuit 1 produces an output signal when an input signal reaches a predetermined value, and a feedback circuit 2, 3 responds to the output signal at 3a and the continuing input signal at 2a to inhibit continuation of the output signal as long as the input continues to exceed the predetermined value. Thus a short pulse is produced at the output each time the input signal passes through the predetermined value in a given direction. The circuits 1, 2, 3 may be NAND gates: with a signal "0" at the input, gates 1, 2 outputs are "1"; consequently the inputs of gate 3 are boch "1" and its output will be "0". If the input increases to "1" (the predetermined value) both inputs to gate 1 become "1" and its output therefore goes to "0", producing the start of the output pulse. The input a of gate 3 is thus "0" and its output goes to "1", so that both inputs to gate 2 are "1" and its output goes to "0"; thus the input b of gate 1 becomes "0" and its output returns to "1" to terminate the output pulse, the duration of which depends upon the propogation times of the gates 2, 3. The pulse may be lengthened by introducing delays in the outputs of the gates 2, 3. Alternatively, the gates 1, 2, 3 may be NOR gates, in which case operation is similar but with signal polarities and changes reversed. In a phase meter (Fig. 3, not shown), two signals whose phases are to be compared are fed to respective pulse generators (5, 6) whose outputs, produced each time the associated input reaches a given value in each cycle, set and reset respectively a bi-stable (7). The pulse width of the bi-stable output therefore varies with the phase relationship, and an integrator 8 produces a phase-dependent signal measured by an indicator 9. In a frequency discriminator (Fig. 4, not shown), a pulse generator (10) receives the F.M. signal and produces constant width pulses whose frequency thus varies at the modulation frequency. An integrator 11 obtains from this a signal whose amplitude varies at the modulation frequency. A frequency comparator (Fig. 5, not shown), producing an output when the frequency of an input signal to one pulse generator (2) falls below that of a reference frequency fed to a second pulse generator (1), includes a binary counter (4) containing two J-K flip-flops, which is started by the inverted (3) output from the reference generator (1) and reset by the next pulse from the signal generator (2). The counter reaches a count of 2 to produce an output signal only if two reference frequency pulses occur between two signal frequency pulses, indicating that the signal frequency has fallen below the reference frequency. Two such circuits (Fig. 6, not shown) are combined to provide an upper and a lower frequency sensitive circuit.