GB1234217A - - Google Patents

Abstract

1,234,217. Transistor sawtooth circuit. SIEMENS A.G. 6 June, 1968 [7 June, 1967; 25 July, 1967], No. 26900/68. Heading H3T. In a line deflection stage, e.g. for a television receiver, a parallel resonant circuit LC is connected across the line output transistor T 10 , a reverse diode D shunted across the output transistor and the supply voltage U G is connected only during the beginning of each flyback period when the output transistor T 10 is blocked. This arrangement minimizes the voltage across the output transistor T 10 . As described, each flyback is initiated by a positive synchronizing pulse fed to winding L 50 and coupled to the base of transistor T 10 via winding L 30 . The switching transistor T 20 becomes turned on when the oscillatory current through L 10 and C L has reached a predetermined value, thus connecting the supply U G which supplies energy to the parallel circuit LC. The forward sweep is initiated by a negative synchronizing pulse fed to L 50 which blocks switching transistor T 20 so that the collector voltage decreases until diode D becomes conductive, initiating a forward sweep. Inductor L may be the deflection coil; capacitor C s providing S-correction. In Fig. 3 (not shown), capacitor C is connected between the collector and the junction of a pair of series connected transistors arranged to be conductive alternately under control of transformer-coupled synchronizing pulses. In Fig. 1 (not shown), the transformers L 10 , L 30 . . . L 50 are omitted, the supply being switched in to the collectors via a current limiting resistor, inductor or harmonic-tuned circuit.