GB1224146A - Process for forming a silicon surface on a substrate - Google Patents
Process for forming a silicon surface on a substrateInfo
- Publication number
- GB1224146A GB1224146A GB509769A GB509769A GB1224146A GB 1224146 A GB1224146 A GB 1224146A GB 509769 A GB509769 A GB 509769A GB 509769 A GB509769 A GB 509769A GB 1224146 A GB1224146 A GB 1224146A
- Authority
- GB
- United Kingdom
- Prior art keywords
- silicon
- substrate
- projections
- reaction
- recesses
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229910052710 silicon Inorganic materials 0.000 title abstract 13
- 239000010703 silicon Substances 0.000 title abstract 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title abstract 12
- 239000000758 substrate Substances 0.000 title abstract 6
- 238000000034 method Methods 0.000 title abstract 2
- 238000006243 chemical reaction Methods 0.000 abstract 5
- 229910004298 SiO 2 Inorganic materials 0.000 abstract 2
- 229910003902 SiCl 4 Inorganic materials 0.000 abstract 1
- 239000012159 carrier gas Substances 0.000 abstract 1
- 238000000151 deposition Methods 0.000 abstract 1
- 239000002019 doping agent Substances 0.000 abstract 1
- 239000007789 gas Substances 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 239000000203 mixture Substances 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- -1 silicon halide Chemical class 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
- H01L21/0243—Surface structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
1,224,146. Depositing/removing silicon from surfaces. COMPAGNIE GENERALE D'ELECTRICITE. 30 Jan., 1969 [1 Feb., 1968], No. 5097/69. Heading C1A. [Also in Divisions C7 and H1] A substrate of silicon is formed with recesses or a substrate is formed with silicon projections, said recesses or projections having orthogonal flanks, by disposing said substrate in a reaction space opposite to a reaction body, which is of silicon if projections are to be formed, an inert layer, e.g. of SiO 2 , formed with apertures corresponding to the recesses or projections being placed over the silicon surface, an atmosphere comprising a silicon halide and an inert carrier gas at less than 50 mm. Hg is maintained between the substrate and reaction body, and a temperature gradient is set up between the substrate and reaction body, the silicon surface being hot, whereby silicon leaves said surface and deposits on the cooler surface as a result of the reaction Si+SiX 4 #. SiX 2 . In Fig. 2 the silicon body 21, is covered with a layer of intermediate inert material 227 (e.g. SiO 2 ) which defines the pattern to be formed, by the removal of Si from the silicon body, in an atmosphere containing preferably between 10<SP>-2</SP> and 10<SP>-4</SP> vol./vol. SiCl 4 at a toal pressure of preferably 1 mm.Hg, a corresponding pattern of silicon 25, being deposited upon the other body 31. The gas mixture may comprise, in addition a dopant. The intermediate layer pattern is preferably formed by the oxidation of the silicon followed by the opening of apertures in a known photolithogravure process.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR138385 | 1968-02-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1224146A true GB1224146A (en) | 1971-03-03 |
Family
ID=8645445
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB509769A Expired GB1224146A (en) | 1968-02-01 | 1969-01-30 | Process for forming a silicon surface on a substrate |
Country Status (5)
Country | Link |
---|---|
BE (1) | BE727229A (en) |
DE (1) | DE1904834A1 (en) |
FR (1) | FR1562993A (en) |
GB (1) | GB1224146A (en) |
NL (1) | NL6901637A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4587928A (en) * | 1975-12-24 | 1986-05-13 | Tokyo Shibaura Electric Co., Ltd. | Apparatus for producing a semiconductor device |
-
1968
- 1968-02-01 FR FR1562993D patent/FR1562993A/fr not_active Expired
-
1969
- 1969-01-22 BE BE727229D patent/BE727229A/xx unknown
- 1969-01-30 GB GB509769A patent/GB1224146A/en not_active Expired
- 1969-01-31 NL NL6901637A patent/NL6901637A/xx unknown
- 1969-01-31 DE DE19691904834 patent/DE1904834A1/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4587928A (en) * | 1975-12-24 | 1986-05-13 | Tokyo Shibaura Electric Co., Ltd. | Apparatus for producing a semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
BE727229A (en) | 1969-07-22 |
FR1562993A (en) | 1969-04-11 |
NL6901637A (en) | 1969-08-05 |
DE1904834A1 (en) | 1969-09-04 |
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