GB1212710A - Circuit arrangement for synchronizing a pal line switch - Google Patents

Circuit arrangement for synchronizing a pal line switch

Info

Publication number
GB1212710A
GB1212710A GB5640367A GB5640367A GB1212710A GB 1212710 A GB1212710 A GB 1212710A GB 5640367 A GB5640367 A GB 5640367A GB 5640367 A GB5640367 A GB 5640367A GB 1212710 A GB1212710 A GB 1212710A
Authority
GB
United Kingdom
Prior art keywords
signal
phase
output
burst
frequency switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5640367A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Priority to GB5640367A priority Critical patent/GB1212710A/en
Publication of GB1212710A publication Critical patent/GB1212710A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/44Colour synchronisation
    • H04N9/465Synchronisation of the PAL-switch

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

1,212,710. Colour television synchronizing. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. (Philips' Gloeilampenfabrieken N.V.). 12 Dec., 1967, No. 56403/67. Heading H4F. In a colour television receiver for the PAL system, the colour synchronizing " burst " Bn (shown in one only of its two quadrature phase positions) is synchronously demodulated at the G-Y axis so that when the line frequency switch included in the demodulation circuit is operating at the correct phase (G-Y), the output Bn1 in response to the " burst " is small, whilst when the switch is operating in the incorrect phase (G-Y) 2 the output Bn2 is substantially at the maximum. The demodulation may be effected by a separate demodulator operating at the positive or negative G-Y axis, or by means of the R-Y and B-Y demodulators, Fig. 1 (not shown), whose outputs are matrixed to produce a G-Y signal. The output due to the " burst " is separated from the output due to the chrominance signal by means of a transistor gate stage, Fig. 3 (not shown), actuated by delayed line fly-back pulses. The separated output is integrated over a number more than 5 or more than 10 of lines in an integrating circuit to produce a signal for a correction signal generator which functions to change the phase of operation of the line frequency switch when a maximum amplitude signal is produced in response to the " burst." The gate stage may be constructed so as to require the input signal to exceed a threshold value. The bandwidth of the coupling circuit to the gate stage is restricted to reduce high frequency noise components. The integrated output from the gate stage passes through a diode which transmits only signals of a polarity which arises when the phase of operation of the line frequency switch is incorrect. The line frequency switch may function to reverse the phase of either the chrominance or reference signal applied to the demodulator. The demodulator may include a delay line system for separating the quadrature phase modulation components of the chrominance signal.
GB5640367A 1967-12-12 1967-12-12 Circuit arrangement for synchronizing a pal line switch Expired GB1212710A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB5640367A GB1212710A (en) 1967-12-12 1967-12-12 Circuit arrangement for synchronizing a pal line switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB5640367A GB1212710A (en) 1967-12-12 1967-12-12 Circuit arrangement for synchronizing a pal line switch

Publications (1)

Publication Number Publication Date
GB1212710A true GB1212710A (en) 1970-11-18

Family

ID=10476527

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5640367A Expired GB1212710A (en) 1967-12-12 1967-12-12 Circuit arrangement for synchronizing a pal line switch

Country Status (1)

Country Link
GB (1) GB1212710A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5185629A (en) * 1975-01-24 1976-07-27 Sony Corp KARAATEREBIJONSHINGONOSAISEIKAIRO
EP0047995A2 (en) * 1980-09-11 1982-03-24 Sanyo Electric Co., Ltd. Circuit for processing color television signal of PAL system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5185629A (en) * 1975-01-24 1976-07-27 Sony Corp KARAATEREBIJONSHINGONOSAISEIKAIRO
JPS5816393B2 (en) * 1975-01-24 1983-03-31 ソニー株式会社 color television simulator
EP0047995A2 (en) * 1980-09-11 1982-03-24 Sanyo Electric Co., Ltd. Circuit for processing color television signal of PAL system
EP0047995A3 (en) * 1980-09-11 1984-11-28 Sanyo Electric Co., Ltd. Circuit for processing color television signal of pal system

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee