GB1205320A - Improvements in or relating to the production of semiconductor devices - Google Patents

Improvements in or relating to the production of semiconductor devices

Info

Publication number
GB1205320A
GB1205320A GB5075268A GB5075268A GB1205320A GB 1205320 A GB1205320 A GB 1205320A GB 5075268 A GB5075268 A GB 5075268A GB 5075268 A GB5075268 A GB 5075268A GB 1205320 A GB1205320 A GB 1205320A
Authority
GB
United Kingdom
Prior art keywords
nitride
mesa
silicon
semi
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5075268A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Publication of GB1205320A publication Critical patent/GB1205320A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76221—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO with a plurality of successive local oxidation steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

1,205,320. Semi-conductor devices. NIPPON TELEGRAPH & TELEPHONE PUBLIC CORP. 25 Oct., 1968 [28 Oct., 1967], No. 50752/68. Heading H1K. A method of producing a mesa type semiconductor element structure, wherein the sides of the mesa are covered with an insulating layer, comprises forming on that part of the surface of the semi-conductor element where the mesa is required a layer 3 of nitride and then oxidizing the remainder of the surface of the element to a depth H such that after the nitride layer 3 is removed to expose the semi-conductor surface the oxide layer 4 still remains over the rest of the surface to leave a mesa of height h whose side walls are protected by the oxide. A PN junction can then be formed in this mesa and a metal contact deposited on its top surface. The semi-conductor material may be silicon, germanium or gallium arsenide, and the nitride layer may be silicon nitride or tantalum nitride. In a further embodiment of the method, where accurately formed hollows are required in a silicon crystal surface, a silicon nitride mask is applied on the surface and apertures formed where the hollows are required. The silicon is then oxidized over these exposed regions into the crystal and then selectively removed to leave the required hollows. The nitride layers are grown from gases and the oxide layers by oxidation, and both are removed by etching processes. The method may be applied in the production of diodes, or transistors of the planar type
GB5075268A 1967-10-28 1968-10-25 Improvements in or relating to the production of semiconductor devices Expired GB1205320A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6900167 1967-10-28

Publications (1)

Publication Number Publication Date
GB1205320A true GB1205320A (en) 1970-09-16

Family

ID=13389909

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5075268A Expired GB1205320A (en) 1967-10-28 1968-10-25 Improvements in or relating to the production of semiconductor devices

Country Status (4)

Country Link
DE (1) DE1805707B2 (en)
FR (1) FR1594694A (en)
GB (1) GB1205320A (en)
NL (1) NL6815286A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2449332A1 (en) * 1979-02-13 1980-09-12 Itt METHOD OF PROTECTING CONTACT AREAS ON SEMICONDUCTOR DEVICES

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL159817B (en) * 1966-10-05 1979-03-15 Philips Nv PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE.
GB1332932A (en) * 1970-01-15 1973-10-10 Mullard Ltd Methods of manufacturing a semiconductor device
US4002511A (en) * 1975-04-16 1977-01-11 Ibm Corporation Method for forming masks comprising silicon nitride and novel mask structures produced thereby
IT1080473B (en) * 1977-07-25 1985-05-16 Ducati Elettrotecnica Spa AUTORIGENE RANTE ELECTRIC CONDENSER WITH MIXED DIELECTRIC
JPS5955052A (en) * 1982-09-24 1984-03-29 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
DE3312076A1 (en) * 1983-04-02 1984-10-04 O.D.A.M. - Office de Distribution d'Appareils Médicaux, Wissembourg HIGH ENERGY DENSITY CAPACITOR AND METHOD FOR PRODUCING THE SAME

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2449332A1 (en) * 1979-02-13 1980-09-12 Itt METHOD OF PROTECTING CONTACT AREAS ON SEMICONDUCTOR DEVICES

Also Published As

Publication number Publication date
FR1594694A (en) 1970-07-17
DE1805707B2 (en) 1972-03-16
DE1805707A1 (en) 1969-08-21
NL6815286A (en) 1969-05-01

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Legal Events

Date Code Title Description
PS Patent sealed
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PE20 Patent expired after termination of 20 years