GB1192554A - Improvements relating to Pattern Recognition Devices - Google Patents

Improvements relating to Pattern Recognition Devices

Info

Publication number
GB1192554A
GB1192554A GB36330/66A GB3633066A GB1192554A GB 1192554 A GB1192554 A GB 1192554A GB 36330/66 A GB36330/66 A GB 36330/66A GB 3633066 A GB3633066 A GB 3633066A GB 1192554 A GB1192554 A GB 1192554A
Authority
GB
United Kingdom
Prior art keywords
name
input
output
descriptor
store
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB36330/66A
Inventor
Christopher Archibald Go Lemay
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMI Ltd
Electrical and Musical Industries Ltd
Original Assignee
EMI Ltd
Electrical and Musical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EMI Ltd, Electrical and Musical Industries Ltd filed Critical EMI Ltd
Priority to GB36330/66A priority Critical patent/GB1192554A/en
Publication of GB1192554A publication Critical patent/GB1192554A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06VIMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V30/00Character recognition; Recognising digital ink; Document-oriented image-based pattern recognition
    • G06V30/10Character recognition
    • G06V30/19Recognition using electronic means
    • G06V30/192Recognition using electronic means using simultaneous comparisons or correlations of the image signals with a plurality of references
    • G06V30/194References adjustable by an adaptive method, e.g. learning

Landscapes

  • Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Theoretical Computer Science (AREA)
  • Image Analysis (AREA)

Abstract

1,192,554. Pattern recognition. ELECTRIC & MUSICAL INDUSTRIES Ltd. 14 Aug., 1967 [13 Aug., 1966], No. 36330/66. Heading G4R. In a pattern recognition device, signals derived from different parts of an applied pattern are compared with stored signals to produce respective name signals when the similarity exceeds a threshold, an output signal indicative of the most probable identity of the applied partern being produced in response to the produced name signals, the threshold for the production of a name signal being varied during a learning mode. A T.V. camera senses the pattern within a retina (matrix array) consisting of a rectangular array of 64 areas, each of 8 x 16 points. The 128 bits from each area form a descriptor input to a respective one of 64 standard units in a first layer of such units, each of which provides a 32- bit descriptor output. Each unit of a second layer of 49 standard units receives the descriptor outputs of four adjacent units of the previous layer to constitute its descriptor input. A third layer of 36 units and a fourth layer of 25 units are fed from the second and third layers respectively in the same way. Each standard unit also receives a 5-bit name input (during learning, i.e. the desired name specified by the operator) and provides a 5-bit name output. All the name outputs go to a name voting unit which selects the most frequently occurring one to constitute the system output during recognition and for comparison with the desired name during learning. An " instruction to learn names " signal applied to all the standard units during learning will be inhibited on equality and also if the retina is more than a predetermined amount off-set from the centre of the pattein. Each standard unit also provides X and Y output signals indicating the direction of movement (along the two orthogonal axes) which the pattern requires to centre it in the retina, as far as the unit can determine. These X and Y signals are supplied to a " servo " voting unit which produces X and Y signals in response to the majority to move the pattern and (during learning) for comparison with operator-specified displacement signals giving the actual position of the centre of the pattern relative to the centre of the retina. Equality in the X or Y case will inhibit a learn X or learn Y signal (respectively) applied to all the standard units during learning. The operatorspecified displacement signals are also supplied to all the standard units as X and Y input signals. Each standard unit can also receive an " end marker " signal (except in the first layer) from the four associated standard units in the previous layer and provide an " end marker " signal to the associated unit(s) in the next layer (see below). Standard unit.-This is shown in Fig. 3, but to simplify the drawing the descriptor input T1, descriptor output T6, name input T2 and name output T3 are shown as consisting of 4, 4, 3 and 3 bits instead of 128, 32, 5 and 5 bits respectively. A clock-driven counter 32 selects at 2 the 32 rows of a store 1A-1E in turn. Each row holds a descriptor in 1A, a name in 1B, a threshold in 1C, X displacement information in 1D, and Y displacement information in 1E. During recognition, the descriptor input T1 is compared at 4-7 with each descriptor from the store portion 1A in turn, an adder 8 indicating the number of bits in agreement (the " score ") in each comparison. The maximum score so far is stored at 9 and when this rises a rise detector 10 gates at 12 the currently-accessed name in store portion 1B to a store 13 via a gate 14 provided the score exceeds the currentlyaccessed threshold from store portion 1C, converted to analogue form at 20 and compared with the score at 19 to control gate 14. Any output from gate 14 causes the maximum score at 9 to be stored at 21. When all the descriptors have been compared, OR gate 49 (responding to the output of store portion 1A) de-inhibits a gate 65 permitting the name in store 13 to pass to the name output T3 from where it goes to the name voting unit as previously stated. Gate 65 may be controlled from counter 32 or selector 2 instead for the same purpose. As successive rows of the store 1A-1E are selected, the counter 32 also selects at 33-37 respective integrators 38-41 to receive the score from adder 8, the integrated values being digitized at 42-45, using a threshold derived from their means, to provide the descriptor output T6. There are in fact 32 integrators &c., one for each row of the store, but only 4 are shown in agreement with the fact that only 4 of the 32 descriptor output bits are shown. Each output of the rise detector 10 also causes the currentlyaccessed X and Y displacement information in store portions 1D, 1E to be inserted into stores 66, 67 respectively (though gating like at 14 and controlled by comparator 19 may also be provided), the contents of stores 66, 67 being passed to the servo voting unit as the X and Y output signals referred to at the end of the cycle of counter 32. After movement of the pattern in response to the servo voting unit, a further recognition cycle is undertaken, and so on for a preset period of time. During learning, the pattern is placed almost centrally with respect to the retina. The " instruction to learn names " signal T8, if not inhibited at 51, will cause the input descriptor T1 and input name T2 to be entered into a row of store 1A-1E. In order to insure that the complete input descriptor is present in the case of standard units fed from other standard units all four input " end marker " signals T11 must be present, or inhibition at 51 will occur. The descriptor currently accessed from store portion 1A (counter 32 cycles continuously in general) is compared with the input name T2 at 4-7 and via 8, 9, 10 &c. as before, can cause the currently-accessed name to be passed from store portion 1B into store 13 provided gate 14 is not inhibited. The input name T2 is compared at 15-18 with store 13, equality also inhibiting the learn signal at 51. In this way, the input descriptor and name T1, T2 are entered into the first vacant row of store 1A-1E. If during continued cycling of counter 32, the score from adder 8 is equal to the maximum stored in 21 (this storing occurs in learning as in recognition) equivalence gate 22 produces an output so that if the name currently read from store portion 1B reaches store 13 and is unequal to the input name T2, according to comparison at 15-18, gate 25 is enabled to add one to the currently accessed threshold value in store portion 1C, using add 1 unit 24. This is necessary since the input descriptor has selected the pattern producing the maximum score but has associated the wrong name with it, and the score of the descriptor exceeded the threshold. Output from equivalence gate 22 inhibits the counter 32 to allow time for this threshold adjustment which is repeated until confusion is eliminated. When counter 32 has run through all the storage rows, the output " end marker " signal T7 is produced. An output from OR gate 49 also inhibits the learn signal at 51. Learn X and learn Y signals at T9 and T10 permit modification of the X and Y displacement information in store portions 1D, 1E in the presence of an output from equivalence gate 22 (which also inhibits counter 32) and provided all four input " end marker " signals T11 are present. The modification is done in adders 55, 56 and consists of adding or subtracting one according to the outputs of quantizers 57, 58 receiving the X input and Y input signals.
GB36330/66A 1966-08-13 1966-08-13 Improvements relating to Pattern Recognition Devices Expired GB1192554A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB36330/66A GB1192554A (en) 1966-08-13 1966-08-13 Improvements relating to Pattern Recognition Devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB36330/66A GB1192554A (en) 1966-08-13 1966-08-13 Improvements relating to Pattern Recognition Devices

Publications (1)

Publication Number Publication Date
GB1192554A true GB1192554A (en) 1970-05-20

Family

ID=10387162

Family Applications (1)

Application Number Title Priority Date Filing Date
GB36330/66A Expired GB1192554A (en) 1966-08-13 1966-08-13 Improvements relating to Pattern Recognition Devices

Country Status (1)

Country Link
GB (1) GB1192554A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4799270A (en) * 1986-03-20 1989-01-17 The Johns Hopkins University Image classifier
WO1989002134A1 (en) * 1987-08-28 1989-03-09 British Telecommunications Public Limited Company Apparatus for pattern recognition

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4799270A (en) * 1986-03-20 1989-01-17 The Johns Hopkins University Image classifier
WO1989002134A1 (en) * 1987-08-28 1989-03-09 British Telecommunications Public Limited Company Apparatus for pattern recognition
GB2215503A (en) * 1987-08-28 1989-09-20 British Telecomm Apparatus for pattern recognition
GB2215503B (en) * 1987-08-28 1992-02-05 British Telecomm Apparatus for pattern recognition
US5175794A (en) * 1987-08-28 1992-12-29 British Telecommunications Public Limited Company Pattern recognition of temporally sequenced signal vectors

Similar Documents

Publication Publication Date Title
US4754493A (en) Automatic recognition and guidance arrangements
US3242467A (en) Temporary storage register
US3221308A (en) Memory system
GB1179029A (en) Apparatus for Recognising a Speech Signal
US3093814A (en) Tag memory
US4074229A (en) Method for monitoring the sequential order of successive code signal groups
US3760356A (en) Technique for determining the extreme binary number from a set of binary numbers
GB1192554A (en) Improvements relating to Pattern Recognition Devices
GB1034814A (en) Improvements relating to data sorting devices
US3290647A (en) Within-limits comparator
GB1127361A (en) Improvements relating to pattern recognition devices
GB1206404A (en) Improvements relating to pattern recognition devices
ES295281A1 (en) Devices for analyzing physical phenomenons, and in particular nuclear phenomenons
US3418632A (en) Means for merging sequences of data
US4841473A (en) Computer architecture providing programmable degrees of an almost condition
US3411138A (en) Self-adaptive information storage devices
US2900135A (en) Digital differential analyzers
US3182180A (en) Division system
US3009638A (en) Trigonometric function generator
SU840887A1 (en) Extremum number determining device
SU993204A1 (en) Multi-variable function identifier
CH414739A (en) Coding device
GB1057946A (en) A storage arrangement with associative interrogation
US3246294A (en) Binary comparator circuit utilizing interrogation
SU811267A1 (en) Logic unit testing device

Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees