GB1159255A - Phase Discriminator - Google Patents

Phase Discriminator

Info

Publication number
GB1159255A
GB1159255A GB4382866A GB4382866A GB1159255A GB 1159255 A GB1159255 A GB 1159255A GB 4382866 A GB4382866 A GB 4382866A GB 4382866 A GB4382866 A GB 4382866A GB 1159255 A GB1159255 A GB 1159255A
Authority
GB
United Kingdom
Prior art keywords
gate
phase
fed
oscillator
gates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4382866A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Publication of GB1159255A publication Critical patent/GB1159255A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

1,159,255. Automatic phase control systems; phase discriminators. INTERNATIONAL STANDARD ELECTRIC CORP. 30 Sept., 1966 [1 Oct., 1965], No. 43828/66. Heading H3A. In phase discriminator for an automatic phase control system, a square wave (a, Fig. 2, not shown) from, oscillator OSC is converted by bi-stable circuit CC, two gates pt1-2 and two inverters inv 1-2, into a positive and a negative train of pulses (ac and ac) of the same width and of half the repetition rate, which are fed respectively to gate pt4 and pt3. The reference waveform b is halved in frequency by bi-stable circuit cd and fed with positive polarity to gate pt4 and with negative polarity to gate pt3. The phase relationships are such that when the oscillator OSC is in phase, the reference pulses (d) fed to gates pt3 and pt4 do not overlap the inputs derived from the oscillator. If the oscillator phase advances (Fig. 3, not shown) the pulse inputs to gate pt4 overlap and produce positive output pulses of duration proportional to the phase error. Similarly a phase delay (Fig. 4, not shown) causes the inputs to gate pt3 to overlap and produce negative output pulses. The outputs of gates pt3-4 are integrated by capacitor cr and fed to a capacitance diode dc controlling the frequency of oscillator OSC. The gate pt3 may comprise an NPN transistor (tr2, Fig. 7, not shown), having its emitter connected to the collectors of two PNP transistors (tr1, tr3) controlled by the input signals. The other gate pt4c may comprise complementary transistors (tr4-6) feeding the common output capacitor cr.
GB4382866A 1965-10-01 1966-09-30 Phase Discriminator Expired GB1159255A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR33412A FR1458661A (en) 1965-10-01 1965-10-01 Synchronization system for oscillator

Publications (1)

Publication Number Publication Date
GB1159255A true GB1159255A (en) 1969-07-23

Family

ID=8589492

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4382866A Expired GB1159255A (en) 1965-10-01 1966-09-30 Phase Discriminator

Country Status (2)

Country Link
FR (1) FR1458661A (en)
GB (1) GB1159255A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2156174A (en) * 1984-03-21 1985-10-02 Plessey Co Plc Electrical oscillator tuning arrangement

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2156174A (en) * 1984-03-21 1985-10-02 Plessey Co Plc Electrical oscillator tuning arrangement

Also Published As

Publication number Publication date
FR1458661A (en) 1966-03-04

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees