GB1129970A - Improved f.m. variable delay - Google Patents

Improved f.m. variable delay

Info

Publication number
GB1129970A
GB1129970A GB723666A GB723666A GB1129970A GB 1129970 A GB1129970 A GB 1129970A GB 723666 A GB723666 A GB 723666A GB 723666 A GB723666 A GB 723666A GB 1129970 A GB1129970 A GB 1129970A
Authority
GB
United Kingdom
Prior art keywords
delay
level
feb
limiters
controlled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB723666A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US344621A external-priority patent/US3293552A/en
Priority claimed from US350908A external-priority patent/US3324251A/en
Priority claimed from US434569A external-priority patent/US3324397A/en
Priority claimed from GB1057665A external-priority patent/GB1105432A/en
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Publication of GB1129970A publication Critical patent/GB1129970A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/0009Time-delay networks

Abstract

1,129,970. Automatic phase control systems; delay circuits. STANDARD TELEPHONES & CABLES Ltd. 18 Feb., 1966 [23 Feb., 1965], No. 7236/66. Addition to 1,105,432. Headings H3A and H4R. Signals to be passed through the variable delay system described in Specification 1,105,432 are used to frequency modulate a carrier, the frequency modulated carrier being applied on lines 401 and 402, Fig. 3, to the delay system 3 which is controlled by a logic and binary counter circuit means as in Specification 1,105,432. The outputs of the delay system are a primary and an auxiliary signal, differing in delay times by the minimum incremental delay, and these may be combined in a sum amplifier 420 after passing through respective variable level limiters 412 and 415 and amplitude-sensitive FM discriminators 413 and 414. The levels of the limiters 412 and 415 are controlled in a complementary manner by a signal from the logic circuit on line 440 via a level control unit 430; linearity of control is provided by means of negative feedback from the level detectors 441 and 442 to the control unit 430.
GB723666A 1964-02-13 1966-02-18 Improved f.m. variable delay Expired GB1129970A (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US344621A US3293552A (en) 1964-02-13 1964-02-13 Phase slope delay
US350908A US3324251A (en) 1964-03-10 1964-03-10 Electronically variable delay
US434569A US3324397A (en) 1965-02-23 1965-02-23 Variable delay system having a plurality of successive delay sections each of a value one-half that of the preceding section
GB1057665A GB1105432A (en) 1965-03-12 1965-03-12 Electronically variable delay

Publications (1)

Publication Number Publication Date
GB1129970A true GB1129970A (en) 1968-10-09

Family

ID=27448054

Family Applications (1)

Application Number Title Priority Date Filing Date
GB723666A Expired GB1129970A (en) 1964-02-13 1966-02-18 Improved f.m. variable delay

Country Status (1)

Country Link
GB (1) GB1129970A (en)

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