GB1117359A - Improvements relating to semiconductor elements - Google Patents

Improvements relating to semiconductor elements

Info

Publication number
GB1117359A
GB1117359A GB31289/65A GB3128965A GB1117359A GB 1117359 A GB1117359 A GB 1117359A GB 31289/65 A GB31289/65 A GB 31289/65A GB 3128965 A GB3128965 A GB 3128965A GB 1117359 A GB1117359 A GB 1117359A
Authority
GB
United Kingdom
Prior art keywords
silicon
wafer
layer
compound
phosphorus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB31289/65A
Inventor
Wilfrid Fletcher
Norman Robert Howard
Anthony Keith Jones
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Associated Electrical Industries Ltd
Original Assignee
Associated Electrical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Associated Electrical Industries Ltd filed Critical Associated Electrical Industries Ltd
Priority to GB31289/65A priority Critical patent/GB1117359A/en
Priority to FR70315A priority patent/FR1487219A/en
Priority to DE19661539655 priority patent/DE1539655A1/en
Priority to SE10069/66A priority patent/SE316537B/xx
Publication of GB1117359A publication Critical patent/GB1117359A/en
Expired legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B31/00Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
    • C30B31/02Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor by contacting with diffusion materials in the solid state
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Thyristors (AREA)

Abstract

In the manufacture of a semi-conductor device (see Division H1) a layer of silicon is first epitaxially deposited on a silicon substrate and a glassy silico-phosphate layer is then formed on the resulting silicon body. Prior to deposition the wafer surface is cleaned by heating to at least 1250 DEG C. in an atmosphere of hydrogen. Hydrogen chloride may also be used in the cleaning process. The silicon wafer is then heated to 900-1350 DEG C., and a mixture comprising dry hydrogen, the vapour of a volatile silicon compound and the vapour of a compound of a required dopant, is passed over it. The silicon compound may be silane, silicon tetrachloride or tetrabromide, trichlorosilane, dichlorosilane, tribromosilane or silicon tetraiodide. The dopant compound may be boron hydride or trichloride, or boron tribromide, to produce a P-type epitaxial layer. For an N-type layer the dopant compound may be the hydride of phosphorus, arsenic or antimony, or a volatile halide such as phosphorus or arsenic trichloride. Subsequent to the above deposition a layer of a glassy silico-phosphate is formed on the silicon wafer by causing it to react with phosphorus pentoxide in gaseous form or in solution, under the influence of heat in the temperature range 1000-1300 DEG C. After deposition the wafer is cooled slowly. This layer preferentially absorbs fast-diffusing contaminants from the silicon wafer, and may subsequently be removed. Alternatively it may be left on the wafer, providing a phosphorus-rich zone at the wafer surface.
GB31289/65A 1965-07-22 1965-07-22 Improvements relating to semiconductor elements Expired GB1117359A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB31289/65A GB1117359A (en) 1965-07-22 1965-07-22 Improvements relating to semiconductor elements
FR70315A FR1487219A (en) 1965-07-22 1966-07-21 silicon elements for high voltage rectifiers and thyristors
DE19661539655 DE1539655A1 (en) 1965-07-22 1966-07-21 Process for the production of multilayer semiconductor components
SE10069/66A SE316537B (en) 1965-07-22 1966-07-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB31289/65A GB1117359A (en) 1965-07-22 1965-07-22 Improvements relating to semiconductor elements

Publications (1)

Publication Number Publication Date
GB1117359A true GB1117359A (en) 1968-06-19

Family

ID=10320921

Family Applications (1)

Application Number Title Priority Date Filing Date
GB31289/65A Expired GB1117359A (en) 1965-07-22 1965-07-22 Improvements relating to semiconductor elements

Country Status (3)

Country Link
DE (1) DE1539655A1 (en)
GB (1) GB1117359A (en)
SE (1) SE316537B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2083428A1 (en) * 1970-03-19 1971-12-17 Mitsubishi Electric Corp
GB2179930A (en) * 1985-09-06 1987-03-18 Philips Electronic Associated A method of depositing an epitaxial silicon layer
US7772097B2 (en) 2007-11-05 2010-08-10 Asm America, Inc. Methods of selectively depositing silicon-containing films

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT380974B (en) * 1982-04-06 1986-08-11 Shell Austria METHOD FOR SETTING SEMICONDUCTOR COMPONENTS
AT384121B (en) * 1983-03-28 1987-10-12 Shell Austria Method for gettering of semiconductor components

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2083428A1 (en) * 1970-03-19 1971-12-17 Mitsubishi Electric Corp
GB2179930A (en) * 1985-09-06 1987-03-18 Philips Electronic Associated A method of depositing an epitaxial silicon layer
US7772097B2 (en) 2007-11-05 2010-08-10 Asm America, Inc. Methods of selectively depositing silicon-containing films

Also Published As

Publication number Publication date
DE1539655A1 (en) 1970-01-15
SE316537B (en) 1969-10-27

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