GB1107259A - Improvements in or relating to decoder circuit arrangements - Google Patents

Improvements in or relating to decoder circuit arrangements

Info

Publication number
GB1107259A
GB1107259A GB1268/67A GB126867A GB1107259A GB 1107259 A GB1107259 A GB 1107259A GB 1268/67 A GB1268/67 A GB 1268/67A GB 126867 A GB126867 A GB 126867A GB 1107259 A GB1107259 A GB 1107259A
Authority
GB
United Kingdom
Prior art keywords
adder
input
signal
phase
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1268/67A
Inventor
Donald Sydney Hobbs
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Components Ltd
Original Assignee
Mullard Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mullard Ltd filed Critical Mullard Ltd
Priority to GB1268/67A priority Critical patent/GB1107259A/en
Priority to GB1267/67A priority patent/GB1106944A/en
Priority to DE19681537982 priority patent/DE1537982A1/en
Priority to GB850/68A priority patent/GB1204036A/en
Priority to NL6800330A priority patent/NL6800330A/xx
Priority to DE19681639281 priority patent/DE1639281A1/en
Publication of GB1107259A publication Critical patent/GB1107259A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N11/00—Colour television systems
    • H04N11/06—Transmission systems characterised by the manner in which the individual colour picture signal components are combined
    • H04N11/12—Transmission systems characterised by the manner in which the individual colour picture signal components are combined using simultaneous signals only
    • H04N11/14—Transmission systems characterised by the manner in which the individual colour picture signal components are combined using simultaneous signals only in which one signal, modulated in phase and amplitude, conveys colour information and a second signal conveys brightness information, e.g. NTSC-system
    • H04N11/16—Transmission systems characterised by the manner in which the individual colour picture signal components are combined using simultaneous signals only in which one signal, modulated in phase and amplitude, conveys colour information and a second signal conveys brightness information, e.g. NTSC-system the chrominance signal alternating in phase, e.g. PAL-system
    • H04N11/165—Decoding means therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Processing Of Color Television Signals (AREA)
  • Rectifiers (AREA)

Abstract

1,107,259. Colour television. MULLARD Ltd. 10 Jan., 1967, No. 1268/67. Heading H4F. The invention relates to a demodulator circuit arrangement for a carrier modulated in different phases by first and second modulation components, the phase of the second component in the modulated carrier being periodically reversed. As described, Fig. 1, for a PAL system subcarrier of the form (E B 1 - E Y <SP>1</SP>) sin wt Œ (E R <SP>1</SP> - E Y <SP>1</SP>) cos wt the phase of the red colourdifference signal being reversed at line frequency, the subcarrier is fed to the first input of adder (or subtractor) circuits 1 and 2. To the second input of adder 1 is fed a signal having the same frequency as the subcarrier and a constant phase # not 90 degrees different from the phase in which the blue colour-difference is modulated on the carrier and with a constant amplitude at least equal to the amplitude of the modulated subcarrier, this signal being generated in generator 3 using the burst signal on line 4 and fed to adder 1 via a Œ90 degrees phase shifter 5. To the second input of adder 2 is fed the signal from generator 3 via a phase switch 6 arranged to switch the phase through 180 degrees in step with the periodic reversal of the red colour-difference signal by means of a PAL switching signal 7. The output of adder 1 is fed to an envelope demodulator 13 and via a hybrid network 8 to the input of a first delay path contained in a one-line period delay line 9. The output of adder 2 is fed to an envelope demodulator 14 and via a hybrid network 10 to the input of a second delay path contained in line 9. The two paths may be identical paths in the line 9 but oppositely directed. Hybrid network 10 directs the output of adder 2 to the input of the second path and the output of the first path to the input of an envelope demodulator 11. Similarly network 8 directs the output of adder 1 to the input of the first path and the output of the second path to the input of an envelope demodulator 12. The four demodulators are arranged to demodulate in the same sense and their outputs are added in adder circuits 15 and 16 as shown. At output terminal 17 is derived the signal 2 (E B 1 - E Y <SP>1</SP>) cos # together with a D.C. component which may be filtered out and at output terminal 18 is derived the signal 2 (E R <SP>1</SP> - E Y <SP>1</SP>) cos #. Since any alteration in angle # will have the same effect on both outputs no hue error is produced. In an alternative embodiment switch 6 is replaced by a direct connection, similar phase inverting switches (not shown) being included in the leads between demodulator 14 and adder 16 and between demodulator 12 and adder 16, so as to operate in alternate senses. The Specification includes a mathematical analysis of the operational steps involved. Circuitry for some of the blocks of Fig. 1 is described with reference to Fig. 2, not shown.
GB1268/67A 1967-01-10 1967-01-10 Improvements in or relating to decoder circuit arrangements Expired GB1107259A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
GB1268/67A GB1107259A (en) 1967-01-10 1967-01-10 Improvements in or relating to decoder circuit arrangements
GB1267/67A GB1106944A (en) 1967-01-10 1967-01-10 Improvements in or relating to decoder circuit arrangements
DE19681537982 DE1537982A1 (en) 1967-01-10 1968-01-05 Circuit arrangement for demodulating a PAL chrominance signal
GB850/68A GB1204036A (en) 1967-01-10 1968-01-05 Circuit arrangement for demodulating a pal-colour signal
NL6800330A NL6800330A (en) 1967-01-10 1968-01-10
DE19681639281 DE1639281A1 (en) 1967-01-10 1968-03-09 Arrangement with rectifier plates

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB1268/67A GB1107259A (en) 1967-01-10 1967-01-10 Improvements in or relating to decoder circuit arrangements
GB1267/67A GB1106944A (en) 1967-01-10 1967-01-10 Improvements in or relating to decoder circuit arrangements
GB850/68A GB1204036A (en) 1967-01-10 1968-01-05 Circuit arrangement for demodulating a pal-colour signal

Publications (1)

Publication Number Publication Date
GB1107259A true GB1107259A (en) 1968-03-27

Family

ID=27253775

Family Applications (3)

Application Number Title Priority Date Filing Date
GB1267/67A Expired GB1106944A (en) 1967-01-10 1967-01-10 Improvements in or relating to decoder circuit arrangements
GB1268/67A Expired GB1107259A (en) 1967-01-10 1967-01-10 Improvements in or relating to decoder circuit arrangements
GB850/68A Expired GB1204036A (en) 1967-01-10 1968-01-05 Circuit arrangement for demodulating a pal-colour signal

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB1267/67A Expired GB1106944A (en) 1967-01-10 1967-01-10 Improvements in or relating to decoder circuit arrangements

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB850/68A Expired GB1204036A (en) 1967-01-10 1968-01-05 Circuit arrangement for demodulating a pal-colour signal

Country Status (3)

Country Link
DE (2) DE1537982A1 (en)
GB (3) GB1106944A (en)
NL (1) NL6800330A (en)

Also Published As

Publication number Publication date
DE1639281A1 (en) 1971-02-11
NL6800330A (en) 1968-07-11
GB1204036A (en) 1970-09-03
DE1537982A1 (en) 1970-08-20
GB1106944A (en) 1968-03-20

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