GB1098826A - Method of making integrated circuit - Google Patents

Method of making integrated circuit

Info

Publication number
GB1098826A
GB1098826A GB3629865A GB3629865A GB1098826A GB 1098826 A GB1098826 A GB 1098826A GB 3629865 A GB3629865 A GB 3629865A GB 3629865 A GB3629865 A GB 3629865A GB 1098826 A GB1098826 A GB 1098826A
Authority
GB
United Kingdom
Prior art keywords
type
substrate
integrated circuit
intrinsic
zone
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3629865A
Inventor
Saburo Iwata
Hajime Yagi
Isamu Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to GB3629865A priority Critical patent/GB1098826A/en
Publication of GB1098826A publication Critical patent/GB1098826A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222Bipolar technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

1,098,826. Integrated circuits. SONY CORPORATION. Aug. 24. 1965, No. 36298/65. Heading H1K. An integrated circuit comprising for example transistors and resistors, is produced by diffusing an impurity of one conductivity type into a semi-conductor substrate of the opposite conductivity type, epitaxially depositing an intrinsic semi-conductor layer on the substrate and then diffusing some of the substrate and previously diffused impurities into the intrinsic layer to form PN-junctions therein. In the example, a boron doped P-type silicon substrate 20, 250Á thick, is diffused in areas 25a, 25b with phosphorus to produce 8Á N-type regions utilizing photo-resist and oxide masking technique and a 15Á epitaxial silicon layer 23 is deposited over the surface; heating at 1300‹ in wet oxygen for 3 hours causes diffusion of the boron and phosphorous into the overlying intrinsic region. Subsequent diffusion processes are used to provide P-type base zone 26 and N-type emitter zone 28 to form a transistor and P-type zone 30 which constitutes a resistor. The resistor and transistor form part of an integrated circuit and are insulated from each other by PN junctions.
GB3629865A 1965-08-24 1965-08-24 Method of making integrated circuit Expired GB1098826A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB3629865A GB1098826A (en) 1965-08-24 1965-08-24 Method of making integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3629865A GB1098826A (en) 1965-08-24 1965-08-24 Method of making integrated circuit

Publications (1)

Publication Number Publication Date
GB1098826A true GB1098826A (en) 1968-01-10

Family

ID=10386849

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3629865A Expired GB1098826A (en) 1965-08-24 1965-08-24 Method of making integrated circuit

Country Status (1)

Country Link
GB (1) GB1098826A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0078571A1 (en) * 1981-10-28 1983-05-11 Koninklijke Philips Electronics N.V. Semiconductor device and method of manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0078571A1 (en) * 1981-10-28 1983-05-11 Koninklijke Philips Electronics N.V. Semiconductor device and method of manufacturing the same

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