GB1089514A - Transistor circuits - Google Patents
Transistor circuitsInfo
- Publication number
- GB1089514A GB1089514A GB428964A GB428964A GB1089514A GB 1089514 A GB1089514 A GB 1089514A GB 428964 A GB428964 A GB 428964A GB 428964 A GB428964 A GB 428964A GB 1089514 A GB1089514 A GB 1089514A
- Authority
- GB
- United Kingdom
- Prior art keywords
- jig
- contact lands
- transistor circuits
- substrate
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
Abstract
1,089,514. Semi-conductor devices. ULTRA ELECTRONICS Ltd. Feb. 25, 1965 [Jan. 31, 1964], No. 4289/64. Heading H1K. A transistor formed in a wafer of semiconductor material and having large contact lands on one face is soldered directly on to a thin film circuit board. As shown, transistors 16, each comprising a silicon substrate 11 with a transistor element 12 surrounded by contact lands 13 which are vapour deposited and then tinned, Fig. 1 (not shown), are placed in recesses 15 in a jig 14 which is then heated. A substrate 17 carrying a circuit 18 is lowered on to the jig which is then allowed to cool.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB428964A GB1089514A (en) | 1964-01-31 | 1964-01-31 | Transistor circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB428964A GB1089514A (en) | 1964-01-31 | 1964-01-31 | Transistor circuits |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1089514A true GB1089514A (en) | 1967-11-01 |
Family
ID=9774341
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB428964A Expired GB1089514A (en) | 1964-01-31 | 1964-01-31 | Transistor circuits |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB1089514A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0103889A2 (en) * | 1982-09-20 | 1984-03-28 | Siemens Aktiengesellschaft | Method and device to mount single integrated circuits on film (micropacks) |
-
1964
- 1964-01-31 GB GB428964A patent/GB1089514A/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0103889A2 (en) * | 1982-09-20 | 1984-03-28 | Siemens Aktiengesellschaft | Method and device to mount single integrated circuits on film (micropacks) |
EP0103889A3 (en) * | 1982-09-20 | 1985-10-30 | Siemens Aktiengesellschaft | Method and device to mount single integrated circuits on film (micropacks) |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB1204759A (en) | Semiconductor switching circuits and integrated devices thereof | |
GB1382203A (en) | Package for microwave semiconductor device | |
GB1161309A (en) | Isolated Resistor for Integrated Circuit | |
JPS5226181A (en) | Semi-conductor integrated circuit unit | |
GB1246864A (en) | Transistor | |
ES363798A1 (en) | Monolithic circuits with pinch resistors | |
GB1106787A (en) | Improvements in semiconductor devices | |
GB1089514A (en) | Transistor circuits | |
GB1125650A (en) | Insulating layers and devices incorporating such layers | |
GB1263504A (en) | Process for making indium antimonide thin film semiconductor elements | |
GB1103184A (en) | Improvements relating to semiconductor circuits | |
GB1360578A (en) | Semiconductor integrated circuits | |
GB1306970A (en) | Semiconductor circuit | |
GB945736A (en) | Improvements relating to semiconductor circuits | |
GB1197317A (en) | Semiconductor Integrated Circuit Arrangement | |
GB1086128A (en) | Fabrication of four-layer switch with controlled breakdown voltage | |
GB1313915A (en) | Resistors for integrated circuits | |
GB961159A (en) | Improvements in bistable circuits and compound semiconductor bodies therefor | |
US3307079A (en) | Semiconductor switch devices | |
GB1334902A (en) | Control of beta gain factor of transistors | |
GB958248A (en) | Semiconductor devices | |
GB1210584A (en) | Semiconductor device and method of manufacturing the same | |
GB1318444A (en) | Field effect semiconductor devices | |
GB1291344A (en) | Semiconductor component | |
FR2269788A1 (en) | Integrated semiconductor cct. for flip-flop - has two complementary transistors implanted in one zone of first conductivity |