GB1079730A - Method of producing smeiconductor contacts - Google Patents

Method of producing smeiconductor contacts

Info

Publication number
GB1079730A
GB1079730A GB2959066A GB2959066A GB1079730A GB 1079730 A GB1079730 A GB 1079730A GB 2959066 A GB2959066 A GB 2959066A GB 2959066 A GB2959066 A GB 2959066A GB 1079730 A GB1079730 A GB 1079730A
Authority
GB
United Kingdom
Prior art keywords
layer
alloy
deposited
semi
contacts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2959066A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1079730A publication Critical patent/GB1079730A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C5/00Alloys based on noble metals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mechanical Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Contacts (AREA)

Abstract

<PICT:1079730/C6-C7/1> Ohmic alloyed contacts to two different conductivity type regions of a semi-conductor body are made by a process in which appropriate metals are deposited from the vapour phase on to the heated semi-conductor. The semi-conductor body is first masked by a surface oxide layer which leaves one or more regions of one conductivity type exposed. An alloy suitable to form an ohmic contact to such regions is then evaporated on to the body with the latter at the alloy-semi-conductor eutectic temperature. Subsequently an isolating metal layer is evaporated on to the alloy layer at a lower temperature such that this metal does not alloy with the layer already present. An aperture is then etched through this double metal layer and through the oxide to expose a region of opposite conductivity type. A second metal alloy is then deposited at a temperature such that it will alloy with the semi-conductor but not with the isolating layer. The first conductivity type region now has an alloyed contact surmounted by two non-alloyed layers and the second conductivity type region has a simple alloy contact, though both contacts are interconnected. A further metal layer may be applied before a final etching treatment to separate the electrodes. The process is particularly described in relation to a gallium arsenide NPN planar transistor, though its possible application to integrated switching circuits is also mentioned. The masking oxide layer is of silicon dioxide on which a thin (200<\>rA) chromium layer may be formed. This chromium is partly etched away to leave chromium areas of a required electrode shape which, being adherent both to the oxide and the contact material, ensure that in the completed device the contacts extend over the oxide as strips of the required shape. The P-type base region is then exposed by further etching before the first alloy, 2% Mg 98% Ag, is deposited with the wafer at 620 DEG C. The isolating, non-alloyed layer is of silver deposited at 450 DEG C. and the second alloy, for contacting the N-type emitter and collector regions, is 2% Te 98%Au also deposited at 450 DEG and the final layer is Au deposited at 300 DEG C. Thus in Fig.5-which shows part of the resulting structure after the final etching to separate the contacts-the emitter contact 14 of Te-Au contacts the semi-conductor through layers 11, 9, 6, 5 of Ag, Mg-Ag, Cr and SiO2 respectively and is surmounted by Au 15, whereas the base contact 10 is of Mg-Ag extending through Cr and SiO2 layers 7, 5 and surmounted by Ag, Pe-Au and Au layers 11, 13, 15 respectively. The purpose of the silver layer 11 is to prevent the Te in layer 13 from contaminating the base contact 10.
GB2959066A 1964-08-21 1966-07-01 Method of producing smeiconductor contacts Expired GB1079730A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE1964J0028835 DE1274735B (en) 1964-08-21 1964-08-21 Method for producing alloy contacts on semiconductor bodies

Publications (1)

Publication Number Publication Date
GB1079730A true GB1079730A (en) 1967-08-16

Family

ID=7203418

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2959066A Expired GB1079730A (en) 1964-08-21 1966-07-01 Method of producing smeiconductor contacts

Country Status (2)

Country Link
DE (1) DE1274735B (en)
GB (1) GB1079730A (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2796562A (en) * 1952-06-02 1957-06-18 Rca Corp Semiconductive device and method of fabricating same
BE575275A (en) * 1958-02-03 1900-01-01
AT222700B (en) * 1959-12-30 1962-08-10 Siemens Ag Method for producing a semiconductor device from silicon

Also Published As

Publication number Publication date
DE1274735B (en) 1968-08-08

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