GB1069506A - A semiconductor device and method of making - Google Patents

A semiconductor device and method of making

Info

Publication number
GB1069506A
GB1069506A GB5410/66A GB541066A GB1069506A GB 1069506 A GB1069506 A GB 1069506A GB 5410/66 A GB5410/66 A GB 5410/66A GB 541066 A GB541066 A GB 541066A GB 1069506 A GB1069506 A GB 1069506A
Authority
GB
United Kingdom
Prior art keywords
film
produced
strips
contacts
boron
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5410/66A
Inventor
Peter Joseph Hagon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
North American Aviation Corp
Original Assignee
North American Aviation Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by North American Aviation Corp filed Critical North American Aviation Corp
Priority to GB5410/66A priority Critical patent/GB1069506A/en
Publication of GB1069506A publication Critical patent/GB1069506A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H01L21/86Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

1,069,506. Semi-conductor devices. NORTH AMERICAN AVIATION Inc. Feb. 8, 1966, No. 5410/66. Heading H1K. A method of making a semi-conductor device in a thin film of monocrystalline semi-conductor material bonded to an insulating substrate comprises masking the surface of the film and diffusing impurity completely through at least two regions of the film to alter its conductivity. A thin film is defined as having a thickness of 50 Š to 3 Á. A plurality of insulated gate F.E.T.'s are produced by epitaxially growing a thin film of P-type silicon doped with boron on a sapphire substrate 20, polishing the surface of the film, oxide masking and etching to divide the film into a plurality of strips 21, bevelling the edges of the strips by mechanical polishing, Fig. 5 (not shown), covering strips 21 with a thermally grown layer of silicon dioxide, masking and etching this oxide layer to form a plurality of strips (25) extending transversely to strip 21, Fig. 4 (not shown), and diffusing boron into the film to form P<SP>+</SP> type regions 23, 24. The oxide masks (25) are widened, or removed and replaced by wider insulating layers 27 and aluminium 'is vapour deposited and etched to form ohmic contacts 30, 32 to regions 23, 24, and gate electrodes 31 over insulating layers 27. The individual F.E.T.'s are isolated by cutting through the source-drain contacts and the semiconductor film. Junction diodes, Figs. 8 to 10 (not shown), may be produced by depositing an N-type silicon film (40) on to a sapphire substrate (41), forming strips, masking with an oxide layer (42) and diffusing in boron to produce P+ type region (45), remasking and diffusing-in phosphorus to produce N+ type region (46), and depositing aluminium contacts (48, 50) on the N + and P + type regions (46, 45) respectively. Bipolar transistors, Figs. 11 to 14 (not shown), may be produced by a process similar to that used for F.E.T.'s except that phosphorus is diffused-in instead of boron to give two N+ type regions (23, 24) which form the emitter and collector. The base contacts (52) are applied to the lateral edges of the original P-type regions. The devices may be fabricated individually or in arrays. The substrate may also be of quarts, glass, or ceramic; the semi-conductor material may also be germanium, gallium arsenide or cadmium telluride;the monocrystalline film may be produced by vapour phase growth, evaporation, or gaseous discharge, or electrochemically; portions of the film may also be removed by mechanical, electron beam, or laser beam milling or alternatively the film may be initially formed in the desired pattern. The contacts may also be produced by selective deposition.
GB5410/66A 1966-02-08 1966-02-08 A semiconductor device and method of making Expired GB1069506A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB5410/66A GB1069506A (en) 1966-02-08 1966-02-08 A semiconductor device and method of making

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB5410/66A GB1069506A (en) 1966-02-08 1966-02-08 A semiconductor device and method of making

Publications (1)

Publication Number Publication Date
GB1069506A true GB1069506A (en) 1967-05-17

Family

ID=9795664

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5410/66A Expired GB1069506A (en) 1966-02-08 1966-02-08 A semiconductor device and method of making

Country Status (1)

Country Link
GB (1) GB1069506A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2017229A1 (en) * 1968-09-03 1970-05-22 Ibm
US4057824A (en) * 1976-04-30 1977-11-08 Rca Corporation P+ Silicon integrated circuit interconnection lines

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2017229A1 (en) * 1968-09-03 1970-05-22 Ibm
US4057824A (en) * 1976-04-30 1977-11-08 Rca Corporation P+ Silicon integrated circuit interconnection lines

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