GB0900748D0 - Memory management unit - Google Patents

Memory management unit

Info

Publication number
GB0900748D0
GB0900748D0 GBGB0900748.5A GB0900748A GB0900748D0 GB 0900748 D0 GB0900748 D0 GB 0900748D0 GB 0900748 A GB0900748 A GB 0900748A GB 0900748 D0 GB0900748 D0 GB 0900748D0
Authority
GB
United Kingdom
Prior art keywords
management unit
memory management
memory
unit
management
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB0900748.5A
Other versions
GB2466981A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd, Advanced Risc Machines Ltd filed Critical ARM Ltd
Priority to GB0900748A priority Critical patent/GB2466981A/en
Publication of GB0900748D0 publication Critical patent/GB0900748D0/en
Publication of GB2466981A publication Critical patent/GB2466981A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/654—Look-ahead translation
GB0900748A 2009-01-16 2009-01-16 Memory management unit with a dedicated cache memory for storing management data used to fetch requested data Withdrawn GB2466981A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0900748A GB2466981A (en) 2009-01-16 2009-01-16 Memory management unit with a dedicated cache memory for storing management data used to fetch requested data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0900748A GB2466981A (en) 2009-01-16 2009-01-16 Memory management unit with a dedicated cache memory for storing management data used to fetch requested data

Publications (2)

Publication Number Publication Date
GB0900748D0 true GB0900748D0 (en) 2009-03-04
GB2466981A GB2466981A (en) 2010-07-21

Family

ID=40445935

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0900748A Withdrawn GB2466981A (en) 2009-01-16 2009-01-16 Memory management unit with a dedicated cache memory for storing management data used to fetch requested data

Country Status (1)

Country Link
GB (1) GB2466981A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101766833B1 (en) * 2010-08-16 2017-08-09 에스프린팅솔루션 주식회사 Image forming apparatus and method for transformation virtual memory address to physical memory address thereof
CN103927130B (en) * 2014-03-14 2016-10-05 山东大学 Based on external memory framework in the unification of memory management unit MMU
GB2545398B (en) * 2015-12-08 2020-02-19 Advanced Risc Mach Ltd Advance loading of memory page access data in data processing systems

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5914730A (en) * 1997-09-09 1999-06-22 Compaq Computer Corp. System and method for invalidating and updating individual GART table entries for accelerated graphics port transaction requests
US6628294B1 (en) * 1999-12-31 2003-09-30 Intel Corporation Prefetching of virtual-to-physical address translation for display data
US20060136696A1 (en) * 2004-12-16 2006-06-22 Grayson Brian C Method and apparatus for address translation
US7793067B2 (en) * 2005-08-12 2010-09-07 Globalfoundries Inc. Translation data prefetch in an IOMMU
US8024547B2 (en) * 2007-05-01 2011-09-20 Vivante Corporation Virtual memory translation with pre-fetch prediction

Also Published As

Publication number Publication date
GB2466981A (en) 2010-07-21

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)