GB0518595D0 - Method for reducing short channel effects in memory cells and related structure - Google Patents

Method for reducing short channel effects in memory cells and related structure

Info

Publication number
GB0518595D0
GB0518595D0 GBGB0518595.4A GB0518595A GB0518595D0 GB 0518595 D0 GB0518595 D0 GB 0518595D0 GB 0518595 A GB0518595 A GB 0518595A GB 0518595 D0 GB0518595 D0 GB 0518595D0
Authority
GB
United Kingdom
Prior art keywords
memory cells
short channel
channel effects
related structure
reducing short
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GBGB0518595.4A
Other versions
GB2434030B (en
GB2434030A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Spansion LLC
Original Assignee
Spansion LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Spansion LLC filed Critical Spansion LLC
Publication of GB0518595D0 publication Critical patent/GB0518595D0/en
Publication of GB2434030A publication Critical patent/GB2434030A/en
Application granted granted Critical
Publication of GB2434030B publication Critical patent/GB2434030B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H01L27/115—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
GB0518595A 2003-05-03 2004-04-13 Method for reducing short channel effects in memory cells and related structure Expired - Fee Related GB2434030B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/429,150 US6773990B1 (en) 2003-05-03 2003-05-03 Method for reducing short channel effects in memory cells and related structure
PCT/US2004/011354 WO2004100230A2 (en) 2003-05-03 2004-04-13 Method for reducing short channel effects in memory cells and related structure

Publications (3)

Publication Number Publication Date
GB0518595D0 true GB0518595D0 (en) 2005-10-19
GB2434030A GB2434030A (en) 2007-07-11
GB2434030B GB2434030B (en) 2008-01-09

Family

ID=32825106

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0518595A Expired - Fee Related GB2434030B (en) 2003-05-03 2004-04-13 Method for reducing short channel effects in memory cells and related structure

Country Status (8)

Country Link
US (2) US6773990B1 (en)
JP (1) JP5258193B2 (en)
KR (1) KR20070012181A (en)
CN (1) CN100433334C (en)
DE (1) DE112004000753B4 (en)
GB (1) GB2434030B (en)
TW (1) TWI339437B (en)
WO (1) WO2004100230A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100771552B1 (en) * 2006-10-31 2007-10-31 주식회사 하이닉스반도체 Mos transistor depressing short channel effect and method of fabricating the same
JP5535945B2 (en) 2008-02-27 2014-07-02 レール・リキード−ソシエテ・アノニム・プール・レテュード・エ・レクスプロワタシオン・デ・プロセデ・ジョルジュ・クロード Method for forming a titanium-containing layer on a substrate using atomic layer deposition (ALD)
KR102070564B1 (en) 2013-08-09 2020-03-02 삼성전자주식회사 Method of Fabricatng Semiconductor devices
US9165944B2 (en) 2013-10-07 2015-10-20 Globalfoundries Inc. Semiconductor device including SOI butted junction to reduce short-channel penalty

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5032881A (en) * 1990-06-29 1991-07-16 National Semiconductor Corporation Asymmetric virtual ground EPROM cell and fabrication method
US5264384A (en) * 1991-08-30 1993-11-23 Texas Instruments Incorporated Method of making a non-volatile memory cell
DE69530527T2 (en) * 1994-03-03 2004-04-08 Rohm Corp., San Jose Low voltage single transistor FLASH EEPROM cell with Fowler-Nordheim programming and erasure
US5773863A (en) * 1994-08-18 1998-06-30 Sun Microsystems, Inc. Low power, high performance junction transistor
US5518942A (en) * 1995-02-22 1996-05-21 Alliance Semiconductor Corporation Method of making flash EPROM cell having improved erase characteristics by using a tilt angle implant
US6093951A (en) * 1997-06-30 2000-07-25 Sun Microsystems, Inc. MOS devices with retrograde pocket regions
JP3147108B2 (en) * 1999-01-20 2001-03-19 日本電気株式会社 Method for manufacturing semiconductor memory device
JP2000357754A (en) * 1999-06-03 2000-12-26 Texas Instr Inc <Ti> Method for saliciding source line in flash memory having sti
EP1096575A1 (en) * 1999-10-07 2001-05-02 STMicroelectronics S.r.l. Non-volatile memory cell with a single level of polysilicon and corresponding manufacturing process
JP2002208645A (en) * 2001-01-09 2002-07-26 Mitsubishi Electric Corp Non-volatile semiconductor storage and manufacturing method therefor

Also Published As

Publication number Publication date
WO2004100230A2 (en) 2004-11-18
CN100433334C (en) 2008-11-12
GB2434030B (en) 2008-01-09
JP2006525673A (en) 2006-11-09
DE112004000753T5 (en) 2006-07-06
CN1826692A (en) 2006-08-30
GB2434030A (en) 2007-07-11
TW200503253A (en) 2005-01-16
US6963106B1 (en) 2005-11-08
TWI339437B (en) 2011-03-21
JP5258193B2 (en) 2013-08-07
US6773990B1 (en) 2004-08-10
WO2004100230A3 (en) 2005-04-21
KR20070012181A (en) 2007-01-25
DE112004000753B4 (en) 2008-06-26

Similar Documents

Publication Publication Date Title
AU2003223386A8 (en) Low-power high-performance memory cell and related methods
AU2003256994A1 (en) Method of apparatus for preventing overtunneling in pfet-based nonvolatile memory cells
HK1174178A1 (en) Method for use in an access point (ap) and an access point (ap) (ap)(ap)
AU2003269041A8 (en) Method and device for screening molecules in cells
AU2002251705A1 (en) Method of reducing disturbs in non-volatile memory
SG121879A1 (en) Memory cell structure
EP1623518A4 (en) Method for providing multi-level access services in common access channel
EP1553734A4 (en) Method and device for roaming-connection in global network
TWI316252B (en) Solid-state memory device and method for arrangement of solid-state memory cells
IL165331A0 (en) Method and system for encapsulating cells
IL166467A0 (en) Auto-stimulating cells and method for making and using the same
AU2003301186A8 (en) Method and apparatus for following cells
AU2003233865A8 (en) Electrolysis cell and method
GB0621481D0 (en) Methods and apparatus for wordline protection in flash memory devices
GB2419407B (en) Methods And Apparatus For Characterising Cells And Treatments
EP1648391A4 (en) Method and preparation for reducing sunburn cell formation in skin
AU2003207364A1 (en) Non-volatile memory test structure and method
GB0400661D0 (en) Memory management method and related system
EP1811793A4 (en) Cell selecting apparatus and cell selecting method
EP1615269A4 (en) Magnetic memory cell, magnetic memory device, and magnetic memory device manufacturing method
EP1540838A4 (en) System and method for rapid text entry in telephone
GB2434030B (en) Method for reducing short channel effects in memory cells and related structure
AU2003277036A8 (en) Method and device for limiting crossover in fuel cell systems
EP1602717A4 (en) Plant and plant cell having been modified in cell multiplication and development/differentiation
AU2003213765A8 (en) Integrated ram and non-volatile memory cell method and structure

Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20150716 AND 20150722

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20190413