GB0412435D0 - Packaged intergrated circuit devices - Google Patents

Packaged intergrated circuit devices

Info

Publication number
GB0412435D0
GB0412435D0 GBGB0412435.0A GB0412435A GB0412435D0 GB 0412435 D0 GB0412435 D0 GB 0412435D0 GB 0412435 A GB0412435 A GB 0412435A GB 0412435 D0 GB0412435 D0 GB 0412435D0
Authority
GB
United Kingdom
Prior art keywords
integrated circuit
interposer
electrically connected
gel
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
GBGB0412435.0A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Melexis NV
Original Assignee
Melexis NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Melexis NV filed Critical Melexis NV
Priority to GBGB0412435.0A priority Critical patent/GB0412435D0/en
Publication of GB0412435D0 publication Critical patent/GB0412435D0/en
Priority to JP2007514204A priority patent/JP2008502130A/en
Priority to EP05748165A priority patent/EP1751793A2/en
Priority to PCT/IB2005/001591 priority patent/WO2005119757A2/en
Priority to KR1020067026374A priority patent/KR20070024603A/en
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/49531Additional leads the additional leads being a wiring board
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C33/00Moulds or cores; Details thereof or accessories therefor
    • B29C33/02Moulds or cores; Details thereof or accessories therefor with incorporated heating or cooling means
    • B29C33/06Moulds or cores; Details thereof or accessories therefor with incorporated heating or cooling means using radiation, e.g. electro-magnetic waves, induction heating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14618Containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

An integrated circuit device (100) comprises an integrated circuit (104) encapsulated in a protective package (108). The integrated circuit (104) incorporates at least one active element, which may be a sensing element or a radiation emitting means. The integrated circuit (104) is mounted on and electrically connected to an interposer (103). The interposer (103) has a substantially identical coefficient of thermal expansion to the integrated circuit (104). The interposer (103) is glued to a lead frame (102). The integrated circuit (104) is electrically connected to the interposer (103) by means of bond wires (106) and the interposer (103) is electrically connected to the peripheral portions (101) of the lead frame (102) by means of bond wires (105). Once the integrated circuit (104), interposer (103) and lead frame (102) have been mounted upon one another and electrically connected, the blob of gel (107) is dispensed onto the top surface of said integrated circuit (104) to form a gel covered assembly. The gel coated assembly is inserted into the cavity of a mould tool. Said cavity is provided with a projection, (110) on its inner surface that is adapted to make contact with said gel blob (107). Plastic moulding compound (108) is then injected into the mould cavity to encapsulate the device in a protective package.
GBGB0412435.0A 2004-06-04 2004-06-04 Packaged intergrated circuit devices Ceased GB0412435D0 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
GBGB0412435.0A GB0412435D0 (en) 2004-06-04 2004-06-04 Packaged intergrated circuit devices
JP2007514204A JP2008502130A (en) 2004-06-04 2005-06-06 Packaged integrated circuit device
EP05748165A EP1751793A2 (en) 2004-06-04 2005-06-06 Packaged integrated circuit devices
PCT/IB2005/001591 WO2005119757A2 (en) 2004-06-04 2005-06-06 Packaged integrated circuit devices
KR1020067026374A KR20070024603A (en) 2004-06-04 2005-06-06 Packaged integrated circuit devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB0412435.0A GB0412435D0 (en) 2004-06-04 2004-06-04 Packaged intergrated circuit devices

Publications (1)

Publication Number Publication Date
GB0412435D0 true GB0412435D0 (en) 2004-07-07

Family

ID=32696634

Family Applications (1)

Application Number Title Priority Date Filing Date
GBGB0412435.0A Ceased GB0412435D0 (en) 2004-06-04 2004-06-04 Packaged intergrated circuit devices

Country Status (5)

Country Link
EP (1) EP1751793A2 (en)
JP (1) JP2008502130A (en)
KR (1) KR20070024603A (en)
GB (1) GB0412435D0 (en)
WO (1) WO2005119757A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005054631A1 (en) * 2005-11-16 2007-05-24 Robert Bosch Gmbh Sensor arrangement with a substrate and with a housing and method for producing a sensor arrangement
KR20120082192A (en) 2011-01-13 2012-07-23 삼성엘이디 주식회사 Light emitting device package
US9690578B2 (en) 2013-02-20 2017-06-27 Intel Corporation High dose radiation detector
JP2021071294A (en) * 2019-10-29 2021-05-06 セイコーエプソン株式会社 Vibration device, electronic device, and moving body

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5173766A (en) * 1990-06-25 1992-12-22 Lsi Logic Corporation Semiconductor device package and method of making such a package
EP1211721A1 (en) * 2000-11-30 2002-06-05 STMicroelectronics S.r.l. Improved electronic device package and corresponding manufacturing method
US7060216B2 (en) * 2001-05-11 2006-06-13 Melexis, Nv Tire pressure sensors and methods of making the same

Also Published As

Publication number Publication date
WO2005119757A2 (en) 2005-12-15
KR20070024603A (en) 2007-03-02
JP2008502130A (en) 2008-01-24
WO2005119757A3 (en) 2006-09-14
EP1751793A2 (en) 2007-02-14

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Legal Events

Date Code Title Description
AT Applications terminated before publication under section 16(1)