GB0015841D0 - Multi-path sigma delta modulator - Google Patents

Multi-path sigma delta modulator

Info

Publication number
GB0015841D0
GB0015841D0 GB0015841A GB0015841A GB0015841D0 GB 0015841 D0 GB0015841 D0 GB 0015841D0 GB 0015841 A GB0015841 A GB 0015841A GB 0015841 A GB0015841 A GB 0015841A GB 0015841 D0 GB0015841 D0 GB 0015841D0
Authority
GB
United Kingdom
Prior art keywords
sigma
delta
section
delta modulator
sigma delta
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0015841A
Other versions
GB2364188A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Priority to GB0015841A priority Critical patent/GB2364188A/en
Publication of GB0015841D0 publication Critical patent/GB0015841D0/en
Publication of GB2364188A publication Critical patent/GB2364188A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M3/324—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement
    • H03M3/346—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M3/368—Continuously compensating for, or preventing, undesired influence of physical parameters of noise other than the quantisation noise already being shaped inherently by delta-sigma modulators
    • H03M3/37—Compensation or reduction of delay or phase error
    • H03M3/374—Relaxation of settling time constraints, e.g. slew rate enhancement
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/40—Arrangements for handling quadrature signals, e.g. complex modulators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

A multi-path sigma-delta modulator (40) has a sample and hold (S/H) section (41) that converts a received analog signal (25) into quadrature and in-phase signals (45,46) and first and second sigma-delta A/D converter stages (52,53) coupled to the S/H section (41) to convert the respective quadrature and in-phase signals into digital output signals, wherein the S/H section (41) and the sigma-delta A/D converters (52, 53) are controlled by non-overlapping clocks wherein the duration of the S/H clock (P1) is shorter than the duration of the sigma-delta A/D converter stage clocks (P2A,P2B).
GB0015841A 2000-06-28 2000-06-28 Multi-path sigma delta modulator Withdrawn GB2364188A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0015841A GB2364188A (en) 2000-06-28 2000-06-28 Multi-path sigma delta modulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0015841A GB2364188A (en) 2000-06-28 2000-06-28 Multi-path sigma delta modulator

Publications (2)

Publication Number Publication Date
GB0015841D0 true GB0015841D0 (en) 2000-08-23
GB2364188A GB2364188A (en) 2002-01-16

Family

ID=9894584

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0015841A Withdrawn GB2364188A (en) 2000-06-28 2000-06-28 Multi-path sigma delta modulator

Country Status (1)

Country Link
GB (1) GB2364188A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60215463T2 (en) * 2002-05-22 2007-02-08 Freescale Semiconductor, Inc., Austin Analog-to-digital converter arrangement and method
US7242334B2 (en) * 2005-12-09 2007-07-10 Sirific Wireless Corporation Wireless receiver circuit with merged ADC and filter
US8264387B2 (en) 2006-03-31 2012-09-11 Silicon Laboratories Inc. Transceiver having multiple signal processing modes of operation
DE102006057926A1 (en) 2006-12-08 2008-06-12 Robert Bosch Gmbh Bandpass filter sigma-delta analog-to-digital converter, e.g. for radio receiver, has two cascaded bandpass filters with first receiving feedback via digital-to-analog converter and control module and second direct from another converter

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2328353B (en) * 1997-08-16 2002-10-02 Nec Technologies GSM mobile receiver

Also Published As

Publication number Publication date
GB2364188A (en) 2002-01-16

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)