FR3116356B1 - Procédé de compilation d’un code source - Google Patents
Procédé de compilation d’un code source Download PDFInfo
- Publication number
- FR3116356B1 FR3116356B1 FR2011657A FR2011657A FR3116356B1 FR 3116356 B1 FR3116356 B1 FR 3116356B1 FR 2011657 A FR2011657 A FR 2011657A FR 2011657 A FR2011657 A FR 2011657A FR 3116356 B1 FR3116356 B1 FR 3116356B1
- Authority
- FR
- France
- Prior art keywords
- code
- source code
- executable
- compiling
- instructions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title abstract 2
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/14—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
- G06F21/54—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow by adding security routines or objects to programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/55—Detecting local intrusion or implementing counter-measures
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
- H04L9/004—Countermeasures against attacks on cryptographic mechanisms for fault attacks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W12/00—Security arrangements; Authentication; Protecting privacy or anonymity
- H04W12/12—Detection or prevention of fraud
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/03—Indexing scheme relating to G06F21/50, monitoring users, programs or devices to maintain the integrity of platforms
- G06F2221/033—Test or assess software
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computing Systems (AREA)
- Devices For Executing Special Programs (AREA)
- Stored Programmes (AREA)
Abstract
Selon un aspect, il est proposé un procédé de compilation par un outil de compilation d’un code source (CS) en un code (PRG) exécutable par ordinateur comprenant : - une réception (20) en entrée de l’outil de compilation du code source,- une traduction (21) du code source (CS) en un code objet comprenant des instructions-machines exécutables par un processeur, puis - une introduction (22), entre des instructions-machines du code objet, d’instructions additionnelles choisies parmi des instructions illégales et des instructions de non opération de façon à obtenir ledit code exécutable (PRG), puis - une délivrance (23) du code exécutable (PRG) en sortie de l’outil de compilation. Figure pour l’abrégé : Figure 2
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR2011657A FR3116356B1 (fr) | 2020-11-13 | 2020-11-13 | Procédé de compilation d’un code source |
US17/451,394 US11893370B2 (en) | 2020-11-13 | 2021-10-19 | System and process for compiling a source code |
CN202111336977.7A CN114489657A (zh) | 2020-11-13 | 2021-11-12 | 用于编译源代码的系统和过程 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR2011657A FR3116356B1 (fr) | 2020-11-13 | 2020-11-13 | Procédé de compilation d’un code source |
FR2011657 | 2020-11-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3116356A1 FR3116356A1 (fr) | 2022-05-20 |
FR3116356B1 true FR3116356B1 (fr) | 2024-01-05 |
Family
ID=75108404
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR2011657A Active FR3116356B1 (fr) | 2020-11-13 | 2020-11-13 | Procédé de compilation d’un code source |
Country Status (2)
Country | Link |
---|---|
US (1) | US11893370B2 (fr) |
FR (1) | FR3116356B1 (fr) |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10101956A1 (de) * | 2001-01-17 | 2002-07-25 | Infineon Technologies Ag | Verfahren zur Erhöhung der Sicherheit einer CPU |
JP2003005980A (ja) * | 2001-06-22 | 2003-01-10 | Matsushita Electric Ind Co Ltd | コンパイル装置およびコンパイルプログラム |
FR2877118B1 (fr) * | 2004-10-22 | 2007-01-19 | Oberthur Card Syst Sa | Protection contre les attaques par generation de fautes sur les instructions de saut |
US20150227371A1 (en) * | 2014-02-12 | 2015-08-13 | Imagination Technologies Limited | Processors with Support for Compact Branch Instructions & Methods |
JP6370098B2 (ja) * | 2014-05-16 | 2018-08-08 | 杉中 順子 | 情報処理装置、情報処理監視方法、プログラム、及び記録媒体 |
US10936714B1 (en) * | 2018-02-02 | 2021-03-02 | Itsec Analytics Pte. Ltd. | Systems and methods for preventing code insertion attacks |
US11809871B2 (en) * | 2018-09-17 | 2023-11-07 | Raytheon Company | Dynamic fragmented address space layout randomization |
US10545850B1 (en) * | 2018-10-18 | 2020-01-28 | Denso International America, Inc. | System and methods for parallel execution and comparison of related processes for fault protection |
-
2020
- 2020-11-13 FR FR2011657A patent/FR3116356B1/fr active Active
-
2021
- 2021-10-19 US US17/451,394 patent/US11893370B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US11893370B2 (en) | 2024-02-06 |
US20220164172A1 (en) | 2022-05-26 |
FR3116356A1 (fr) | 2022-05-20 |
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Legal Events
Date | Code | Title | Description |
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PLFP | Fee payment |
Year of fee payment: 2 |
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PLSC | Publication of the preliminary search report |
Effective date: 20220520 |
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PLFP | Fee payment |
Year of fee payment: 3 |
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PLFP | Fee payment |
Year of fee payment: 4 |