FR3095296A1 - Centripetal bumping layout - Google Patents

Centripetal bumping layout Download PDF

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Publication number
FR3095296A1
FR3095296A1 FR1904169A FR1904169A FR3095296A1 FR 3095296 A1 FR3095296 A1 FR 3095296A1 FR 1904169 A FR1904169 A FR 1904169A FR 1904169 A FR1904169 A FR 1904169A FR 3095296 A1 FR3095296 A1 FR 3095296A1
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France
Prior art keywords
contact surface
bumps
zone
bump
pitch
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
FR1904169A
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French (fr)
Inventor
Laurent Schwartz
David KAIRE
Jerome Lopez
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Grenoble 2 SAS
STMicroelectronics Alps SAS
Original Assignee
STMicroelectronics Grenoble 2 SAS
STMicroelectronics Alps SAS
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Filing date
Publication date
Application filed by STMicroelectronics Grenoble 2 SAS, STMicroelectronics Alps SAS filed Critical STMicroelectronics Grenoble 2 SAS
Priority to FR1904169A priority Critical patent/FR3095296A1/en
Priority to US16/847,934 priority patent/US20200335466A1/en
Priority to FR2003781A priority patent/FR3095297A1/en
Priority to CN202010311806.8A priority patent/CN111834328A/en
Priority to CN202020592475.5U priority patent/CN211907429U/en
Publication of FR3095296A1 publication Critical patent/FR3095296A1/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13012—Shape in top view
    • H01L2224/13014—Shape in top view being circular or elliptic
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
    • H01L2224/1308—Plural core members being stacked
    • H01L2224/13082—Two-layer arrangements
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141—Disposition
    • H01L2224/1412—Layout
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/141—Disposition
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    • H01L2224/1414—Circular array, i.e. array with radial symmetry
    • H01L2224/14141—Circular array, i.e. array with radial symmetry being uniform, i.e. having a uniform pitch across the array
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/141—Disposition
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    • H01L2224/1414—Circular array, i.e. array with radial symmetry
    • H01L2224/14142—Circular array, i.e. array with radial symmetry being non uniform, i.e. having a non uniform pitch across the array
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141—Disposition
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    • H01L2224/1414—Circular array, i.e. array with radial symmetry
    • H01L2224/14143—Circular array, i.e. array with radial symmetry with a staggered arrangement, e.g. depopulated array
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141—Disposition
    • H01L2224/1412—Layout
    • H01L2224/1414—Circular array, i.e. array with radial symmetry
    • H01L2224/14143—Circular array, i.e. array with radial symmetry with a staggered arrangement, e.g. depopulated array
    • H01L2224/14145—Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141—Disposition
    • H01L2224/1412—Layout
    • H01L2224/1414—Circular array, i.e. array with radial symmetry
    • H01L2224/14143—Circular array, i.e. array with radial symmetry with a staggered arrangement, e.g. depopulated array
    • H01L2224/14146—Covering only the central area of the surface to be connected, i.e. central arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141—Disposition
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    • H01L2224/14177—Combinations of arrays with different layouts
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141—Disposition
    • H01L2224/1412—Layout
    • H01L2224/14179—Corner adaptations, i.e. disposition of the bump connectors at the corners of the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

Centripetal bumping layout The present disclosure relates to a substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being orientated on the contact surface in a centripetal arrangement, wherein the bumps in a first zone of the contact surface have a first pitch in a first axis and the bumps in a second zone of the contact surface have a second pitch in the first axis, the second pitch being different to the first pitch. Abstract figure : Fig. 7Centripetal bumping layout The present disclosure relates to a substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being oriented on the contact surface in a centripetal arrangement, wherein the bumps in a first zone of the contact surface have a first pitch in a first axis and the bumps in a second zone of the contact surface have a second pitch in the first axis, the second pitch being different to the first pitch. Abstract figure: Fig. 7

Description

Centripetal bumping layoutCentripetal bumping layout

The present disclosure relates generally to the field of integrated circuit chips, and in particular to a flip chip assembly and a substrate using bumps to form electrical connections with the chip.The present disclosure relates generally to the field of integrated circuit chips, and in particular to a flip chip assembly and a substrate using bumps to form electrical connections with the chip.

A problem with existing bump layouts is that they can lead to short circuits.A problem with existing bump layouts is that they can lead to short circuits.

According to one embodiment, there is a variable safety sizing around the bumps.According to one embodiment, there is a variable safety sizing around the bumps.

According to one embodiment, there is a translation of the bumps into a 2D shape.According to one embodiment, there is a translation of the bumps into a 2D shape.

According to one embodiment, there is a circular orientation of the bumps.According to one embodiment, there is a circular orientation of the bumps.

According to one embodiment, the bump placement is automated.According to one embodiment, the bump placement is automated.

According to one aspect, there is provided a substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being orientated on the contact surface in a centripetal arrangement, wherein the bumps in a first zone of the contact surface have a first pitch in a first axis and the bumps in a second zone of the contact surface have a second pitch in the first axis, the second pitch being different to the first pitch.According to one aspect, there is provided a substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being oriented on the contact surface in a centripetal arrangement, wherein the bumps in a first zone of the contact surface have a first pitch in a first axis and the bumps in a second zone of the contact surface have a second pitch in the first axis, the second pitch being different to the first pitch.

According to one embodiment, a bump density in the first zone is different from a bump density in the second zone.According to one embodiment, a bump density in the first zone is different from a bump density in the second zone.

According to one embodiment, there is an exclusion zone around each of the bumps in which no other bump is formed, wherein the exclusion zone for example has a first width in a first axis and a second width in a second axis perpendicular to the first axis, the first and second widths being different from each other.According to one embodiment, there is an exclusion zone around each of the bumps in which no other bump is formed, wherein the exclusion zone for example has a first width in a first axis and a second width in a second axis perpendicular to the first axis , the first and second widths being different from each other.

According to one embodiment, the exclusion zone is hexagonal or substantially hexagonal.According to one embodiment, the exclusion zone is hexagonal or substantially hexagonal.

According to one embodiment, each bump is oblong in shape, or substantially oblong in shape.According to one embodiment, each bump is oblong in shape, or substantially oblong in shape.

According to a further aspect, there is provided a substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being orientated on the contact surface in a centripetal arrangement, wherein the centers of the bumps are positioned in a first pattern in a first zone of the contact surface and in a second pattern, different to the first pattern, in a second zone of the contact surface, the first and second patterns for example defining the spacing between the centers of the bumps in the plane of the contact surface.According to a further aspect, there is provided a substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being oriented on the contact surface in a centripetal arrangement, wherein the centers of the bumps are positioned in a first pattern in a first zone of the contact surface and in a second pattern, different to the first pattern, in a second zone of the contact surface, the first and second patterns for example defining the spacing between the centers of the bumps in the plane of the contact surface.

According to one embodiment, the first zone is a central zone of the contact surface, and the second zone is an annular zone surrounding the central zone.According to one embodiment, the first zone is a central zone of the contact surface, and the second zone is an annular zone surrounding the central zone.

According to a further aspect, there is provided a substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being orientated on the contact surface in a centripetal arrangement, wherein the bumps are positioned such that the centers of the bumps in the plane of the contact surface are not aligned.According to a further aspect, there is provided a substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being oriented on the contact surface in a centripetal arrangement, wherein the bumps are positioned such that the centers of the bumps in the plane of the contact surface are not aligned.

According to a further aspect, there is provided a method of circuit conception implemented by a processing device under control of software instructions, the method comprising:

  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example orientated on the contact surface in a centripetal arrangement, and/or such that the bumps in a first zone of the contact surface have a first pitch in a first axis and the bumps in a second zone of the contact surface have a second pitch in the first axis, the second pitch being different to the first pitch.
According to a further aspect, there is provided a method of circuit design implemented by a processing device under control of software instructions, the method comprising:
  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example oriented on the contact surface in a centripetal arrangement, and/or such that the bumps in a first zone of the contact surface have a first pitch in a first axis and the bumps in a second zone of the contact surface have a second pitch in the first axis, the second pitch being different to the first pitch.

According to a further aspect, there is provided a method of circuit conception implemented by a processing device under control of software instructions, the method comprising:

  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example orientated on the contact surface in a centripetal arrangement, and/or such that the centers of the bumps are positioned in a first pattern in a first zone of the contact surface and in a second pattern, different to the first pattern, in a second zone of the contact surface, the first and second patterns for example defining the spacing between the centers of the bumps in the plane of the contact surface.
According to a further aspect, there is provided a method of circuit design implemented by a processing device under control of software instructions, the method comprising:
  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example oriented on the contact surface in a centripetal arrangement, and/or such that the centers of the bumps are positioned in a first pattern in a first zone of the contact surface and in a second pattern, different to the first pattern, in a second zone of the contact surface, the first and second patterns for example defining the spacing between the centers of the bumps in the plane of the contact surface.

According to a further aspect, there is provided a method of circuit conception implemented by a processing device under control of software instructions, the method comprising:

  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example orientated on the contact surface in a centripetal arrangement, and/or such that the bumps are positioned such that the centers of the bumps in the plane of the contact surface are not aligned.
According to a further aspect, there is provided a method of circuit design implemented by a processing device under control of software instructions, the method comprising:
  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example oriented on the contact surface in a centripetal arrangement, and/or such that the bumps are positioned such that the centers of the bumps in the plane of the contact surface are not aligned.

The foregoing features and advantages, as well as others, will be described in detail in the following description of specific embodiments given by way of illustration and not limitation with reference to the accompanying drawings, in which:The foregoing features and advantages, as well as others, will be described in detail in the following description of specific embodiments given by way of illustration and not limitation with reference to the accompanying drawings, in which:

Figure 1 illustrates an embodiment of the present disclosure; Figure 1 illustrates an embodiment of the present disclosure;

Figure 2 illustrates an embodiment of the present disclosure; Figure 2 illustrates an embodiment of the present disclosure;

Figure 3 illustrates an embodiment of the present disclosure; Figure 3 illustrates an embodiment of the present disclosure;

Figure 4 illustrates an embodiment of the present disclosure; Figure 4 illustrates an embodiment of the present disclosure;

Figure 5 illustrates an embodiment of the present disclosure; Figure 5 illustrates an embodiment of the present disclosure;

Figure 6 illustrates an embodiment of the present disclosure; Figure 6 illustrates an embodiment of the present disclosure;

Figure 7 illustrates an embodiment of the present disclosure; Figure 7 illustrates an embodiment of the present disclosure;

Figure 8 illustrates an embodiment of the present disclosure; Figure 8 illustrates an embodiment of the present disclosure;

Figure 9 illustrates an embodiment of the present disclosure; Figure 9 illustrates an embodiment of the present disclosure;

Figure 10 illustrates an embodiment of the present disclosure; Figure 10 illustrates an embodiment of the present disclosure;

Figure 11 illustrates an embodiment of the present disclosure; Figure 11 illustrates an embodiment of the present disclosure;

Figure 12 illustrates an embodiment of the present disclosure; Figure 12 illustrates an embodiment of the present disclosure;

Figure 13 illustrates an embodiment of the present disclosure; Figure 13 illustrates an embodiment of the present disclosure;

Like features have been designated by like references in the various figures. In particular, the structural and/or functional features that are common among the various embodiments may have the same references and may dispose identical structural, dimensional and material properties.Like features have been designated by like references in the various figures. In particular, the structural and/or functional features that are common among the various embodiments may have the same references and may dispose identical structural, dimensional and material properties.

For the sake of clarity, only the operations and elements that are useful for an understanding of the embodiments described herein have been illustrated and described in detail.For the sake of clarity, only the operations and elements that are useful for an understanding of the embodiments described herein have been illustrated and described in detail.

Unless indicated otherwise, when reference is made to two elements connected together, this signifies a direct connection without any intermediate elements other than conductors, and when reference is made to two elements linked or coupled together, this signifies that these two elements can be connected or they can be linked or coupled via one or more other elements.Unless indicated otherwise, when reference is made to two elements connected together, this signifies a direct connection without any intermediate elements other than conductors, and when reference is made to two elements linked or coupled together, this signifies that these two elements can be connected or they can be linked or coupled via one or more other elements.

In the following disclosure, unless indicated otherwise, when reference is made to absolute positional qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or to relative positional qualifiers, such as the terms "above", "below", "higher", "lower", etc., or to qualifiers of orientation, such as "horizontal", "vertical", etc., reference is made to the orientation shown in the figures.In the following disclosure, unless indicated otherwise, when reference is made to absolute positional qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or to relative positional qualifiers, such as the terms "above", "below", "higher", "lower", etc., or to qualifiers of orientation, such as "horizontal", "vertical", etc., reference is made to the orientation shown in the figures.

Unless specified otherwise, the expressions "around", "approximately", “substantially” and "in the order of" signify within 10 %, and preferably within 5 %.Unless specified otherwise, the expressions "around", "approximately", “substantially” and "in the order of" signify within 10%, and preferably within 5%.

Field of application
Presentation of the technical domain of the invention
Flip Chip Assembly Substrate Packaging for fine bump pitch.Field of application
Presentation of the technical domain of the invention
Flip Chip Assembly Substrate Packaging for fine bump pitch.

Recognized problem,
Increase the bump density and avoid short failure. Having a maximum number of bumps is key to assure good electrical performance (Power integrity) & thermal performance without increasing the die size.Recognized problem,
Increase the bump density and avoid short failure. Having a maximum number of bumps is key to ensure good electrical performance (Power integrity) & thermal performance without increasing the die size.

For some Flip Chip products, non-symmetrical bump shape is used (ex. Oblong shape). In order to minimize the stress implied by package / assembly process to the die, Bump are following particular orientation (ex. 4 segments, 8 segments, centripetal …).For some Flip Chip products, non-symmetrical bump shape is used (ex. Oblong shape). In order to minimize the stress implied by package / assembly process to the die, Bump are following particular orientation (ex. 4 segments, 8 segments, centripetal…).

In some cases (ex. High-end digital products, latest wafer nodes), a very high bump density is required. Target being to minimize die size and to insure Signal & Power Integrity of the die + package.In some cases (e.g. High-end digital products, latest wafer nodes), a very high bump density is required. Target being to minimize die size and to insure Signal & Power Integrity of the die + package.

=> Such dense configurations may end up with High Short Circuit rate between bumps during assembly process.=> Such dense configurations may end up with High Short Circuit rate between bumps during assembly process.

EyeQ5 - Centripetal bumping matrixEyeQ5 - Centripetal bumping matrix

FC pad –Solder Mask OpeningFC pad –Solder Mask Opening

Oblong bumpoblong bump

Risk of Short cutRisk of short cut

Known closest prior solution to the same technical problemKnown closest prior solution to the same technical problem

A: Reduce Bump sizeA: Reduce Bump size

Higher risk of Time zero or Reliability Failures linked to higher stress in Bump and under the bump (inside silicon)Higher risk of Time zero or Reliability Failures linked to higher stress in Bump and under the bump (inside silicon)

B: Increase Bump PitchB: Increase Bump Pitch

Die size increase = Die cost increase, not always affordable (especially with latest very expensive wafer nodes)Die size increase = Die cost increase, not always affordable (especially with latest very expensive wafer nodes)

C: Change Bump shape to symmetricalC: Change Bump shape to symmetrical

May increase the risk of Time zero or Reliability Failures linked to higher stress in Bump and under the bump (inside silicon).May increase the risk of Time zero or Reliability Failures linked to higher stress in Bump and under the bump (inside silicon).

ContextBackground

The introduction of new FE technology such 7FF or 16FF (TSMC) needs to develop new bumping strategy to reduce the bump pitch up to 110µmThe introduction of new FE technology such 7FF or 16FF (TSMC) needs to develop new bumping strategy to reduce the bump pitch up to 110µm

To avoid stress and short failure, bumping house has integrated the Oblong & centripetal orientation as a main solution.
EyeQ5 – Xray view
EyeQ5 – centripetal constraint.To avoid stress and short failure, bumping house has integrated the Oblong & centripetal orientation as a main solution.
EyeQ5 – Xray view
EyeQ5 – centripetal constraint.

Linear (staggered) matrixLinear (staggered) matrix

Bump short violation in the cornerBump short violation in the corner

Linear matrix is no more the optimum matrix for centripetal oblong bump or is requiring to relax bump pitch in the corner.Linear matrix is no more the optimum matrix for centripetal oblong bump or is requiring to relax bump pitch in the corner.

Algorithm to optimize the number of bumps overview
Corner areaAlgorithm to optimize the number of bumps overview
Corner area

Peripheral middle areaPeripheral middle area

New bumps location to be automated (slow centripetal shift not detectable with manual placement).New bumps location to be automated (slow centripetal shift not detectable with manual placement).

Clearance rules overview
Sectors : angle in degree
Min bump to bump pitch : 110 µm
Min UBM clearance rules as per drawing :
Rules applies only in the sector that contains the minimum bump clearance
36µm clearance, 36µm clearance, 36µm clearance
70µm clearance, 36µm clearance, 36µm clearance
36µm clearance, 70µm clearanceClearance rules overview
Sectors: angle in degree
Min bump to bump pitch: 110 µm
Min UBM clearance rules as per drawing:
Rules applies only in the sector that contains the minimum bump clearance
36µm clearance, 36µm clearance, 36µm clearance
70µm clearance, 36µm clearance, 36µm clearance
36µm clearance, 70µm clearance

Rout Keep Out (RKO) from Clearance rules
RKO Shape 131.7x113.6
Physical Bump dimension : 62x80
FCPad
RKO shape creation
Global view
Zoom viewRout Keep Out (RKO) from Clearance rules
RKO Shape 131.7x113.6
Physical Bump size: 62x80
FCPad
RKO shape creation
Global view
Zoom view

Prove of concept: Bump Density Checks
Criteria to measure the density :
To correctly count the number of bump in a zone :
- Bump center should be in the Zone
- We should have no RKO overlaps.
- Bump should follow the centripetal algorithm.
- Bump should be fully enclosed in the die size but the RKO could be outside (*).
Die size is defined by 6863.679 x 6915.498
The count is done per drawn Zone ( cf picture) dimensionsProve of concept: Bump Density Checks
Criteria to measure the density:
To correctly count the number of bumps in a zone:
- Bump center should be in the Zone
- We should have no RKO overlaps.
- Bump should follow the centripetal algorithm.
- Bump should be fully enclosed in the die size but the RKO could be outside (*).
Die size is defined by 6863.679 x 6915.498
The count is done by drawn Area ( cf picture) dimensions

Scope of the inventionScope of invention

Short terms is related to products using TSMC Wafers (Any 16nm and below Front End technology)Short terms is related to products using TSMC Wafers (Any 16nm and below Front End technology)

Medium term could be deployed to products using various FE technology (from ST or External Foundries)Medium term could be deployed to products using various FE technology (from ST or External Foundries)

Advantages versus known solutionsAdvantages versus known solutions

The advantages are the following:The advantages are the following:

Minimize Die Size Increase to the strict minimum (as we are using a kind of highly-customized Bump Pitch increase)Minimize Die Size Increase to the bare minimum (as we are using a kind of highly-customized Bump Pitch increase)

No degradation on failure risk (both Time zero and reliability)No degradation on failure risk (both Time zero and reliability)

Minimize density loss compared to staggered bump matrixMinimize density loss compared to staggered bump matrix

Maximize the bumps count
AJOUTER DES “CLUE SPECIFIC” : Ex. % UBM or % Die Size increase entre les solutions conventionnelles et celle-ciMaximize the bumps count
ADD CLUE SPECIFIC: Ex. % UBM or % Die Size increase between conventional solutions and this one

It is the new and the most optimized solution for solving the technical problem (existing one are significantly less competitive or more risky).It is the new and the most optimized solution for solving the technical problem (existing one are significantly less competitive or more risky).

Today, bump matrix creation are following the staggered rules. By introducing a centripetal algorithm, the invention can minimize density loss compared.Today, bump matrix creation are following the staggered rules. By introducing a centripetal algorithm, the invention can minimize density loss compared.

KeywordsKeywords

Bumping technology, Fine bump pitch.Bumping technology, Fine bump pitch.

Solution detectabilitySolution detectability

What would be thehintto identify the product concerned?What would be the hint to identify the product concerned?

7FF/16FF production with aggressive pitch7FF/16FF production with aggressive pitch

What would it take toprovethe use of your solution?What would it take to prove the use of your solution?

3D- XRAY view (none destructive)3D-XRAY view (non-destructive)

Comparison between Bump count vs Die size in DatasheetComparison between Bump count vs Die size in Datasheet

Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these embodiments can be combined and other variants will readily occur to those skilled in the art.Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these embodiments can be combined and other variants will readily occur to those skilled in the art.

Finally, the practical implementation of the embodiments and variants described herein is within the capabilities of those skilled in the art based on the functional description provided hereinabove.Finally, the practical implementation of the embodiments and variants described herein is within the capabilities of those skilled in the art based on the functional description provided hereinabove.

Claims (11)

A substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being orientated on the contact surface in a centripetal arrangement, wherein the bumps in a first zone of the contact surface have a first pitch in a first axis and the bumps in a second zone of the contact surface have a second pitch in the first axis, the second pitch being different to the first pitch.A substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being orientated on the contact surface in a centripetal arrangement, wherein the bumps in a first zone of the contact surface have a first pitch in a first axis and the bumps in a second zone of the contact surface have a second pitch in the first axis, the second pitch being different to the first pitch. The substrate of claim 1, wherein a bump density in the first zone is different from a bump density in the second zone.The substrate of claim 1, wherein a bump density in the first zone is different from a bump density in the second zone. The substrate of claim 1 or 2, wherein there is an exclusion zone around each of the bumps in which no other bump is formed, wherein the exclusion zone for example has a first width in a first axis and a second width in a second axis perpendicular to the first axis, the first and second widths being different from each other.The substrate of claim 1 or 2, wherein there is an exclusion zone around each of the bumps in which no other bump is formed, wherein the exclusion zone for example has a first width in a first axis and a second width in a second axis perpendicular to the first axis, the first and second widths being different from each other. The substrate of claim 3, wherein the exclusion zone is hexagonal or substantially hexagonal.The substrate of claim 3, wherein the exclusion zone is hexagonal or substantially hexagonal. The substrate of any of claims 1 to 4, wherein each bump is oblong in shape, or substantially oblong in shape.The of any of claims 1 to 4, wherein each bump is oblong in shape, or substantially oblong in shape. A substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being orientated on the contact surface in a centripetal arrangement, wherein the centers of the bumps are positioned in a first pattern in a first zone of the contact surface and in a second pattern, different to the first pattern, in a second zone of the contact surface, the first and second patterns for example defining the spacing between the centers of the bumps in the plane of the contact surface.A substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being orientated on the contact surface in a centripetal arrangement, wherein the centers of the bumps are positioned in a first pattern in a first zone of the contact surface and in a second pattern, different to the first pattern, in a second zone of the contact surface, the first and second patterns for example defining the spacing between the centers of the bumps in the plane of the contact surface. The substrate of any of claims 1 to 6, wherein the first zone is a central zone of the contact surface, and the second zone is an annular zone surrounding the central zone.The first zone of any of claims 1 to 6, wherein the first zone is a central zone of the contact surface, and the second zone is an annular zone surrounding the central zone. A substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being orientated on the contact surface in a centripetal arrangement, wherein the bumps are positioned such that the centers of the bumps in the plane of the contact surface are not aligned.A substrate comprising a contact surface having bumps formed thereon, each bump being rotationally asymmetric in the plane of the contact surface, the bumps for example being orientated on the contact surface in a centripetal arrangement, wherein the bumps are positioned such that the centers of the bumps in the plane of the contact surface are not aligned. A method of circuit conception implemented by a processing device under control of software instructions, the method comprising:
  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example orientated on the contact surface in a centripetal arrangement, and/or such that the bumps in a first zone of the contact surface have a first pitch in a first axis and the bumps in a second zone of the contact surface have a second pitch in the first axis, the second pitch being different to the first pitch.
A method of circuit conception implemented by a processing device under control of software instructions, the method comprising:
  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example orientated on the contact surface in a centripetal arrangement, and / or such that the bumps in a first zone of the contact surface have a first pitch in a first axis and the bumps in a second zone of the contact surface have a second pitch in the first axis, the second pitch being different to the first pitch.
A method of circuit conception implemented by a processing device under control of software instructions, the method comprising:
  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example orientated on the contact surface in a centripetal arrangement, and/or such that the centers of the bumps are positioned in a first pattern in a first zone of the contact surface and in a second pattern, different to the first pattern, in a second zone of the contact surface, the first and second patterns for example defining the spacing between the centers of the bumps in the plane of the contact surface.
A method of circuit conception implemented by a processing device under control of software instructions, the method comprising:
  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example orientated on the contact surface in a centripetal arrangement, and / or such that the centers of the bumps are positioned in a first pattern in a first zone of the contact surface and in a second pattern, different to the first pattern, in a second zone of the contact surface, the first and second patterns for example defining the spacing between the centers of the bumps in the plane of the contact surface.
A method of circuit conception implemented by a processing device under control of software instructions, the method comprising:
  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example orientated on the contact surface in a centripetal arrangement, and/or such that the bumps are positioned such that the centers of the bumps in the plane of the contact surface are not aligned.
A method of circuit conception implemented by a processing device under control of software instructions, the method comprising:
  • defining dimensions of each pump in the plane of a contact surface defined by a circuit design; and
  • automatically performing placement of bumps on the contact surface such that the bumps are for example orientated on the contact surface in a centripetal arrangement, and / or such that the bumps are positioned such that the centers of the bumps in the plane of the contact surface are not aligned.
FR1904169A 2019-04-18 2019-04-18 Centripetal bumping layout Pending FR3095296A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1904169A FR3095296A1 (en) 2019-04-18 2019-04-18 Centripetal bumping layout
US16/847,934 US20200335466A1 (en) 2019-04-18 2020-04-14 Centripetal bumping layout and method
FR2003781A FR3095297A1 (en) 2019-04-18 2020-04-15 Centripetal arrangement of bosses and method
CN202010311806.8A CN111834328A (en) 2019-04-18 2020-04-20 Centripetal bump layout and method
CN202020592475.5U CN211907429U (en) 2019-04-18 2020-04-20 Bump substrate, circuit and flip chip assembly

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1904169A FR3095296A1 (en) 2019-04-18 2019-04-18 Centripetal bumping layout
FR1904169 2019-04-18

Publications (1)

Publication Number Publication Date
FR3095296A1 true FR3095296A1 (en) 2020-10-23

Family

ID=72841493

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1904169A Pending FR3095296A1 (en) 2019-04-18 2019-04-18 Centripetal bumping layout

Country Status (1)

Country Link
FR (1) FR3095296A1 (en)

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