FR3091375B1 - Instruction de chargement-stockage - Google Patents

Instruction de chargement-stockage Download PDF

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Publication number
FR3091375B1
FR3091375B1 FR1906123A FR1906123A FR3091375B1 FR 3091375 B1 FR3091375 B1 FR 3091375B1 FR 1906123 A FR1906123 A FR 1906123A FR 1906123 A FR1906123 A FR 1906123A FR 3091375 B1 FR3091375 B1 FR 3091375B1
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France
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loading
specifying
registers
address
load
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FR1906123A
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FR3091375A1 (fr
Inventor
Alan Graham Alexander
Simon Christian Knowles
Mrudula Gore
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Graphcore Ltd
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Graphcore Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30141—Implementation provisions of register files, e.g. ports
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G06F9/3455—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results using stride
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G06F9/3888—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple threads [SIMT] in parallel

Abstract

INSTRUCTION DE CHARGEMENT-STOCKAGE Processeur ayant un jeu d’instructions comprenant une instruction de chargement-stockage ayant des opérandes spécifiant, parmi les registres se trouvant dans au moins un banc de registres, une destination respective de chacune de deux opérations de chargement, une source respective d’une opération de stockage, et une paire de registres d’adresses agencée pour contenir trois adresses mémoire, les trois adresses mémoire étant une adresse de chargement respective pour chacune des deux opérations de chargement et une adresse de stockage respective pour l’opération de stockage. L’instruction de chargement-stockage comprend en outre trois opérandes de pas immédiats spécifiant chacun une valeur de pas respective pour chacune des deux adresses de chargement et pour l’adresse de stockage, au moins certaines valeurs possibles de chaque opérande de pas immédiat spécifiant la valeur de pas respective en spécifiant l’un d’une pluralité de champs dans un registre de pas dans l’un desdits un ou plusieurs bancs de registres, chaque champ contenant une valeur de pas différente. Figure pour l'abrégé : Fig. 7
FR1906123A 2018-12-31 2019-06-07 Instruction de chargement-stockage Active FR3091375B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB1821300.9 2018-12-31
GB1821300.9A GB2584268B (en) 2018-12-31 2018-12-31 Load-Store Instruction

Publications (2)

Publication Number Publication Date
FR3091375A1 FR3091375A1 (fr) 2020-07-03
FR3091375B1 true FR3091375B1 (fr) 2024-04-12

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FR1906123A Active FR3091375B1 (fr) 2018-12-31 2019-06-07 Instruction de chargement-stockage

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US (1) US11467833B2 (fr)
JP (1) JP6944974B2 (fr)
KR (1) KR102201935B1 (fr)
CN (1) CN111381880B (fr)
CA (1) CA3040794C (fr)
DE (1) DE102019112353A1 (fr)
FR (1) FR3091375B1 (fr)
GB (1) GB2584268B (fr)

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US11561791B2 (en) 2018-02-01 2023-01-24 Tesla, Inc. Vector computational unit receiving data elements in parallel from a last row of a computational array
GB2580664B (en) * 2019-01-22 2021-01-13 Graphcore Ltd Double load instruction
US20220197653A1 (en) * 2020-12-22 2022-06-23 Intel Corporation Processors, methods, systems, and instructions to select and store data elements from strided data element positions in a first dimension from three source two-dimensional arrays in a result two-dimensional array
GB202112803D0 (en) * 2021-09-08 2021-10-20 Graphcore Ltd Processing device using variable stride pattern
CN114090079B (zh) * 2021-11-16 2023-04-21 海光信息技术股份有限公司 串操作方法、串操作装置以及存储介质
CN116126252B (zh) * 2023-04-11 2023-08-08 南京砺算科技有限公司 数据加载方法及图形处理器、计算机可读存储介质

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US3417375A (en) * 1966-03-25 1968-12-17 Burroughs Corp Circuitry for rotating fields of data in a digital computer
EP0442116A3 (en) * 1990-02-13 1993-03-03 Hewlett-Packard Company Pipeline method and apparatus
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JP5237722B2 (ja) * 2008-08-13 2013-07-17 ペンタックスリコーイメージング株式会社 撮像装置
EP2352082B1 (fr) * 2008-10-14 2018-11-28 National University Corporation Nara Institute of Science and Technology Dispositif de traitement de données pour réaliser plusieurs processus de calcul en parallèle
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Publication number Publication date
JP6944974B2 (ja) 2021-10-06
US20200210187A1 (en) 2020-07-02
CN111381880A (zh) 2020-07-07
JP2020109604A (ja) 2020-07-16
GB2584268A (en) 2020-12-02
FR3091375A1 (fr) 2020-07-03
US11467833B2 (en) 2022-10-11
CA3040794C (fr) 2022-08-16
CN111381880B (zh) 2023-07-07
DE102019112353A1 (de) 2020-07-02
GB2584268B (en) 2021-06-30
GB201821300D0 (en) 2019-02-13
CA3040794A1 (fr) 2020-06-30
KR20200083123A (ko) 2020-07-08
KR102201935B1 (ko) 2021-01-12

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