FR3074931B1 - Architectures de processeur - Google Patents
Architectures de processeur Download PDFInfo
- Publication number
- FR3074931B1 FR3074931B1 FR1762068A FR1762068A FR3074931B1 FR 3074931 B1 FR3074931 B1 FR 3074931B1 FR 1762068 A FR1762068 A FR 1762068A FR 1762068 A FR1762068 A FR 1762068A FR 3074931 B1 FR3074931 B1 FR 3074931B1
- Authority
- FR
- France
- Prior art keywords
- architecture
- control unit
- flows
- processor
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
- G06F15/7871—Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/447—Target code generation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/47—Retargetable compilers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
- G06F9/44589—Program code verification, e.g. Java bytecode verification, proof-carrying code
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Devices For Executing Special Programs (AREA)
Abstract
Un processeur (1) comprenant une unité de contrôle (3) et une pluralité d'unités de traitement (5) interagissant selon une architecture de fonctionnement imposée dynamiquement par l'uni té de contrôle parmi au moins deux des architectures suivantes et des combinaisons d'architectures suivantes : - une architecture à unique flux d'instructions et multiples flux de données (SIMD), - une architecture à multiples flux d'instructions et unique flux de données (MISD), - une architecture à multiples flux d'instructions et multiples flux de données (MIMD). L'architecture de fonctionnement est imposée dynamiquement par l'unité de contrôle selon : - des fonctions de configuration incluses dans un code machine, et/ou - des données à traiter et d'instructions de traitement courantes reçues en entrée du processeur.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1762068A FR3074931B1 (fr) | 2017-12-13 | 2017-12-13 | Architectures de processeur |
KR1020207020211A KR20200121788A (ko) | 2017-12-13 | 2018-11-27 | 프로세서 아키텍처들 |
EP18833085.6A EP3724779A1 (fr) | 2017-12-13 | 2018-11-27 | Architectures de processeur |
CN201880080771.2A CN111512296A (zh) | 2017-12-13 | 2018-11-27 | 处理器架构 |
PCT/FR2018/052995 WO2019115902A1 (fr) | 2017-12-13 | 2018-11-27 | Architectures de processeur |
US16/771,376 US20210173809A1 (en) | 2017-12-13 | 2018-11-27 | Processor architectures |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1762068 | 2017-12-13 | ||
FR1762068A FR3074931B1 (fr) | 2017-12-13 | 2017-12-13 | Architectures de processeur |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3074931A1 FR3074931A1 (fr) | 2019-06-14 |
FR3074931B1 true FR3074931B1 (fr) | 2020-01-03 |
Family
ID=61802089
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1762068A Active FR3074931B1 (fr) | 2017-12-13 | 2017-12-13 | Architectures de processeur |
Country Status (6)
Country | Link |
---|---|
US (1) | US20210173809A1 (fr) |
EP (1) | EP3724779A1 (fr) |
KR (1) | KR20200121788A (fr) |
CN (1) | CN111512296A (fr) |
FR (1) | FR3074931B1 (fr) |
WO (1) | WO2019115902A1 (fr) |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5765011A (en) * | 1990-11-13 | 1998-06-09 | International Business Machines Corporation | Parallel processing system having a synchronous SIMD processing with processing elements emulating SIMD operation using individual instruction streams |
CA2073516A1 (fr) * | 1991-11-27 | 1993-05-28 | Peter Michael Kogge | Ordinateur a reseau de processeurs paralleles multimode dynamiques |
US5933642A (en) * | 1995-04-17 | 1999-08-03 | Ricoh Corporation | Compiling system and method for reconfigurable computing |
US5903771A (en) * | 1996-01-16 | 1999-05-11 | Alacron, Inc. | Scalable multi-processor architecture for SIMD and MIMD operations |
US8099777B1 (en) * | 2004-08-26 | 2012-01-17 | Rockwell Collins, Inc. | High security, multi-level processor and method of operating a computing system |
GB2437836B (en) * | 2005-02-25 | 2009-01-14 | Clearspeed Technology Plc | Microprocessor architectures |
US8156474B2 (en) * | 2007-12-28 | 2012-04-10 | Cadence Design Systems, Inc. | Automation of software verification |
KR100960148B1 (ko) * | 2008-05-07 | 2010-05-27 | 한국전자통신연구원 | 데이터 프로세싱 회로 |
WO2014142704A1 (fr) * | 2013-03-15 | 2014-09-18 | Intel Corporation | Procédés et appareil pour compiler des instructions pour une architecture de processeur à vecteurs de pointeurs d'instruction |
CN104424158A (zh) * | 2013-08-19 | 2015-03-18 | 上海芯豪微电子有限公司 | 基于通用单元的高性能处理器系统和方法 |
KR20160061701A (ko) * | 2014-11-24 | 2016-06-01 | 삼성전자주식회사 | 서로 다른 정확도를 갖는 연산기들을 이용하여 데이터를 처리하는 방법 및 장치 |
JP6427055B2 (ja) * | 2015-03-31 | 2018-11-21 | 株式会社デンソー | 並列化コンパイル方法、及び並列化コンパイラ |
-
2017
- 2017-12-13 FR FR1762068A patent/FR3074931B1/fr active Active
-
2018
- 2018-11-27 EP EP18833085.6A patent/EP3724779A1/fr active Pending
- 2018-11-27 US US16/771,376 patent/US20210173809A1/en active Pending
- 2018-11-27 KR KR1020207020211A patent/KR20200121788A/ko unknown
- 2018-11-27 WO PCT/FR2018/052995 patent/WO2019115902A1/fr unknown
- 2018-11-27 CN CN201880080771.2A patent/CN111512296A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
FR3074931A1 (fr) | 2019-06-14 |
US20210173809A1 (en) | 2021-06-10 |
KR20200121788A (ko) | 2020-10-26 |
EP3724779A1 (fr) | 2020-10-21 |
WO2019115902A1 (fr) | 2019-06-20 |
CN111512296A (zh) | 2020-08-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLSC | Publication of the preliminary search report |
Effective date: 20190614 |
|
PLFP | Fee payment |
Year of fee payment: 3 |
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PLFP | Fee payment |
Year of fee payment: 4 |
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PLFP | Fee payment |
Year of fee payment: 5 |
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PLFP | Fee payment |
Year of fee payment: 6 |
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PLFP | Fee payment |
Year of fee payment: 7 |