FR3069397A1 - CIRCUIT AND METHOD FOR CONTROLLING AN AUDIO AMPLIFIER - Google Patents

Abstract

An audio amplifier circuit comprising: an audio amplifier (308) adapted to operate at a common mode voltage level (VCM) and having an input node for receiving an audio signal (y [n], VIN) and an output (310) coupled to a load (104) via a coupling capacitor (112); and an input circuit (301) adapted to detect amplitude levels of an input audio signal (x [n], x (t)) and to generate a variable common mode compensation signal (CM_COMP [ n], VCM COMP) on the basis of the detected amplitude levels, and to add the variable common mode compensation signal (CM_COMP [n], VCM_COMP) to a delayed version (x '[n], x' (t )) of the input audio signal (x [n]) to generate the audio signal (y [n], VIN) with a variable common mode level.

Description

CIRCUIT AND METHOD FOR DRIVING AN AUDIO AMPLIFIER

Field of the invention

The present description relates to the field of audio amplifiers, and in particular a circuit and a method for controlling an audio amplifier.

Presentation of 1 ¹ prior art

Clicking noises are a well known problem in audio amplifiers, and correspond to an audible click or click occurring when the amplifier is turned on or off. This noise is due to the fact that the amplifier is coupled to the load, such as speakers or headphones, via a coupling capacitor. A coupling capacitor is used for audio amplifiers in which the reference voltage of the loudspeakers, which is for example the ground, is different from the common mode voltage of the amplifier. The coupling capacitor blocks the DC level of direct current at the output of the amplifier so that the load receives only the useful audio signal. In order to allow a reasonable response at low frequencies, the coupling capacitor is generally relatively large, typically at least 200 pF for a load of 16 ohms. The popping noise is the result of the fast charging or discharging, B13883 of this coupling capacitor when the amplifier is activated or deactivated.

The amplifier input signal is generally supplied by a digital-to-analog converter (DAC), and a solution which has been proposed to reduce the clicking noise is to provide a start-up phase during which the DAC is initially controlled. to force a low signal at the output of the amplifier, then to gradually increase the output signal to charge the coupling capacitor gradually without causing a popping noise. The audio signal is then applied after the coupling capacitor has been charged at the common mode level. However, a disadvantage of this solution is that it adds complexity to the DAC and delays the start of the audio signal.

There is therefore a need in the art for an alternative solution to reduce the clicking noise at the output of an audio amplifier.

summary

An object of embodiments of the present description is to respond at least partially to one or more needs of the prior art.

In one aspect, an audio amplifier circuit is provided comprising an audio amplifier adapted to operate at a common mode voltage level and comprising an input node for receiving an audio signal and an output intended to be coupled to a load by the through a coupling capacitor; and an input circuit adapted to: detect amplitude levels of an input audio signal and generate a variable common mode compensation signal based on the detected amplitude levels; and adding the variable common mode compensation signal to a delayed version of the input audio signal to generate the audio signal, the audio signal having a variable common mode level.

According to one embodiment, during a power-up phase of the audio amplifier, the input circuit is

B13883 adapted to initially adjust the variable common mode compensation signal at a first level to bring the output of the audio amplifier to less than 50 mV from a reference level of the load.

According to one embodiment, the input circuit is adapted to vary the variable common mode level during powering up of the audio amplifier from a first level to a second level, the second level being the mode voltage audio amplifier common.

According to one embodiment, the input circuit is adapted to detect the amplitude level of the input audio signal on the basis of the absolute value function of the input audio signal.

According to one embodiment, the input circuit is adapted to detect the amplitude of the input audio signal by carrying out an envelope detection.

According to one embodiment, the input circuit is adapted to generate the variable common mode compensation signal by generating an amplitude level signal representing the amplitude level of the input audio signal and by filtering the signal. amplitude level using a low pass filter.

According to one embodiment, the audio amplifier circuit comprises a control circuit adapted to control the cut-off frequency of the low-pass filter as a function of the level of the input audio signal or of a detected amplitude level of the audio signal d 'Entrance.

According to one embodiment, the control circuit is adapted to control the time constant of the low-pass filter so that it is inversely proportional to the level of the input audio signal or to a detected amplitude level of the audio signal d 'Entrance.

According to one embodiment, the audio amplifier circuit further comprises a delay circuit adapted to generate the delayed version of the input audio signal by introducing a delay equal to at least the delay introduced by the low-pass filter.

B13883

According to one embodiment, the input circuit comprises a digital-analog converter adapted to convert the audio input signal into an analog signal, and an analog circuit adapted to detect the amplitude levels of the input audio signal and generating the variable common mode compensation signal based on the detected amplitude levels.

According to one embodiment, the analog circuit comprises a full-wave rectifier or a full-wave rectifier.

According to one embodiment, the audio amplifier circuit further comprises a digital analog converter separate from, or integrated with the audio amplifier and adapted to convert the audio signal into an analog audio signal.

According to one embodiment, the audio amplifier is a class G or class H audio amplifier having a variable supply voltage based on the variable common mode compensation signal.

In another aspect, there is provided a method comprising: generating an audio signal to drive an audio amplifier adapted to operate at a common mode voltage level and having an input node for receiving the audio signal and an output coupled to a load via a coupling capacitor, generating the audio signal comprising: detecting amplitude levels of an input audio signal and generating a variable common mode compensation signal based on the amplitude levels detected; and adding the variable common mode compensation signal to a delayed version of the input audio signal to generate the audio signal, the audio signal having a variable common mode level.

Brief description of the drawings

The aforementioned characteristics and advantages and others will appear clearly with the following detailed description of embodiments, given by way of illustration and not by limitation, with reference to the attached drawings in which:

. B13883 Figure 1 schematically illustrates an audio circuit which has been proposed;

Figure 2 is a graph illustrating the output voltage of the audio circuit of Figure 1;

FIG. 3 schematically illustrates an audio circuit according to an exemplary embodiment;

FIG. 4A is a graph illustrating an input signal and a detected amplitude level of the input signal of FIG. 3 according to an exemplary embodiment;

FIG. 4B is a graph illustrating an output voltage of the amplifier circuit of FIG. 3 according to an exemplary embodiment;

FIG. 5 schematically illustrates an input circuit of an audio amplifier according to another exemplary embodiment;

Figure 6Ά is a graph illustrating an example of a transfer function of a filter of Figure 5 according to an exemplary embodiment;

FIG. 6B is a graph illustrating the time constant of the filter of FIG. 5 according to an exemplary embodiment;

FIG. 7A schematically illustrates an audio circuit according to yet another exemplary embodiment;

FIG. 7B schematically illustrates an amplitude detection and filtering circuit of FIG. 7A in more detail according to an exemplary embodiment;

FIG. 7C schematically illustrates an amplitude detection and filtering circuit of FIG. 7A in more detail according to an alternative embodiment;

FIG. 8 schematically illustrates an audio circuit according to another exemplary embodiment;

FIG. 9 is a graph illustrating an example of signals in the circuit of FIG. 8 according to an exemplary embodiment;

FIG. 10 schematically illustrates an audio amplifier incorporating a DAC (digital-analog converter) according to an exemplary embodiment of the present description; and

B13883 FIG. 11 schematically illustrates an audio amplifier incorporating a DAC according to another exemplary embodiment of the present description.

detailed description

In the following description, the term approximately is used to denote a tolerance of plus or minus 10 percent with respect to the value in question. Connected clothing is used to designate a direct electrical connection between components, while the term coupled is used to designate an electrical connection which can be direct, or which can be made via one or more intermediate components such as resistors, capacitors, transistors, etc.

FIG. 1 illustrates an audio circuit 100 based on a conventional approach. The audio circuit 100 comprises an audio output amplifier 101 comprising an amplifier (AMP) 102 which is for example an operational amplifier. The output of amplifier 102 drives a load 104, such as speakers or headphones. Amplifier 102 is coupled in an inverting amplifier configuration, with a resistor RI coupled between a negative input node of amplifier 102 and an input node 106 of audio amplifier 101, and a resistor R2 coupled between the negative input node and an output node 108 of the amplifier 102. The resistors RI and R2 each have for example a resistance of the order of 1 kilo-ohm to 5 kilo-ohms, and the ratio between their resistors determines the gain of the audio amplifier 101.

A positive input node of the amplifier 102 is for example coupled to a common mode voltage Vq ^. The input node 106 receives for example an analog input voltage Vj ^, supplied by a digital-analog converter (DAC) 110. The DAC 110 performs for example a digital to analog conversion of a digital input signal x [n] in order to generate the analog voltage signal Vjjq.

, B13883

The amplifier 102 is for example coupled to a supply voltage rail VDD and to a ground voltage rail. The common mode voltage Vq _M is for example at a level substantially equal to VDD / 2. In alternative embodiments, rather than being grounded, the low tension rail could be at a different tension level like a negative tension, and the common mode tension is for example approximately at the intermediate point between the levels of voltage of the supply voltage rail and the low voltage rail.

The output node 108 of the amplifier 102 is coupled via a coupling capacitor 112 to the load 104. In the case where the load 104 is a pair of headphones, the coupling capacitor 112 has for example a capacity of the order of 100 to 500 pF. In the case where the load is a line input having a resistance of approximately 10 kilo-ohms, the capacitance of the coupling capacitor 112 is for example approximately 1 pF. More generally, the value of the capacity is for example chosen as a function of the resistance of the load and as a function of the bandwidth of the audio signal. Given the size of the coupling capacitor 112, it is for example mounted outside the chip.

The rapid charging and discharging of the capacitor 112 during the activation and deactivation of the amplifier 102 will cause an audible click noise that can be heard in the speaker 104.

FIG. 2 is a graph illustrating a possible solution to the problem of popping noise, a solution which involves the application of a voltage ramp to slowly charge the coupling capacitor 112, and thus which avoids popping noise when the amplifier audio is activated and before audio playback begins. As illustrated, a linear ramp is for example applied in order to bring the output voltage Vgy _T of the audio amplifier 102 from a low level to the level before the audio signal begins. In view of the fact that the audio amplifier 101 is a reversing amplifier, this implies for example the application by the DAC 110, at the level of the input node 106 of a voltage ramp starting at a high level and falling to the level of the common mode voltage Vqv [before the audio signal begins. A disadvantage of this technique is that, to prevent the ramp from being heard, its gradient must be relatively small, and therefore that it is necessary to introduce a significant delay, for example up to 500 ms or more, between the activation of amplifier 102 and the start of audio playback. In addition, the circuit for generating and applying the ramp adds complexity to the design.

FIG. 3 schematically illustrates an audio circuit 300 according to an embodiment of the present description. Elements similar to those present in the audio circuit 100 of FIG. 1 have the same numerical references in FIG. 3 and will not be described again in detail.

The audio circuit 300 comprises for example an input circuit 301 for generating a signal y [n] to be amplified. The input circuit 301 receives for example a digital input audio signal x [n]. The input circuit 301 comprises for example an amplitude detection and filtering circuit (AMPLITUDE DETECTION + FILTERING) 302, adapted to receive the input audio signal x [n] and to detect the amplitude level of this signal. The amplitude level of the input audio signal can for example be detected on the basis of the absolute value function of the input audio signal x [n], although in alternative embodiments of other types of signal processing can be applied to detect fluctuations in the amplitude of the input signal. In addition, in some embodiments, circuit 302 performs envelope detection on the detected amplitude of the input signal. In some embodiments, circuit 302 integrates the detected amplitude by applying a low-pass filter to the signal. In addition, in some embodiments circuit 302 detects one or more peaks in the amplitude of the audio signal.

The circuit 302 generates an amplitude signal E [n] representing the absolute amplitude level of the signal x [n]. The

B13883 signal E [n] comprises for example monotonic increasing portions and / or monotonic decreasing portions, as will be described in more detail below. The signal E [n] is for example supplied to an adder 303, which adds to the signal E [n] a negative value -CM, described in more detail below, in order to generate a digital variable common mode compensation signal CM_COMP [not].

The output signal CM_COMP [n] is supplied to an adder 304. The adder 304 also receives a delayed version x '[n] of the input audio signal x [n] generated by a delay circuit (DELAY) 306, which for example introduces a delay tg of between 1 and 30 ms, and in certain embodiments of between 2 and 10 ms. The adder 304 adds the signals x ¹ [n] is CM_COMP [n] in order to generate the modified input signal y [n]. The signal y [n] is for example supplied to an audio output amplifier (DAC + AMP) 308, incorporating for example a digital-analog converter (DAC), and driving the load 104 at an output node 310, via the coupling capacitor 112, with an output voltage signal ^V OUT ·

The addition of the signal CM_COMP [n] to the input signal x '[n] causes an offset in the common mode level Vq ^' of the voltage output signal as a function of the amplitude of the input signal. In this way, the common mode level Vq ^ 'of the voltage output signal Vqjjt can be increased from an initial level to a higher level, the upper level corresponding substantially to the common mode level Vq _M of the amplifier. audio. The sound generated by these shifts in the common mode level Vq ^ 'of the voltage output signal νθ _υτ will be masked by the audio signal itself. Indeed, the common mode level Vcm 'is increased in response to an increase in the amplitude level of the input signal, which means that the increase in the common mode level V ^ m' will be masked by the signal audio, and so is not going to be noticeable by ear.

B13883

In certain embodiments, the initial level of the variable common mode compensation signal CM_COMP [n], and thus that of the signal y [n], is chosen so that the level of the output voltage νθυψ of the amplifier audio 308 is at the reference level of the output load, for example to ground. For example, assuming that the input audio signal x [n] has a common mode level of zero, and that the audio output amplifier 308 has positive gain, initially when the signals x [n] and E [n] are low, the CM_COMP signal [n] is for example equal to -CM, or CM is the digital value which corresponds, after analog conversion and amplification, to the common mode voltage Vq _M of the audio output amplifier 308. As a variant, if the audio output amplifier 308 is an inverting amplifier, the adder 303 adds for example CM to the signal E [n], and the signal CM_COMP [n] is initially equal to CM. The variable common mode compensation signal CM_COMP [n] for example reaches a level of zero once the amplitude of the input signal has increased sufficiently. The common mode level Vq _M 'of the audio output signal Vqut will then reach the common mode voltage Vq ^.

In some embodiments, the audio amplifier 308 is implemented by the DAC 110 and the audio amplifier 101 of Figure 1, or by a similar circuit having an amplifier operating at a common mode voltage

Although in some embodiments the delay circuit 306, the amplitude detection and filtering circuit 302 and the adders 303 and 304 can be implemented by hardware circuits, for example forming part of an ASIC (circuit integrated application specific), it will be clear to those skilled in the art that some or all of the functions of these circuits could be implemented in the form of software by a processing device under the control of software instructions. stored in one or more instruction memories.

. B13883

Furthermore, although the embodiment of Figure 3 corresponds to a non-differential implementation, those skilled in the art will readily know how the embodiment could be adapted to a differential implementation.

We will now describe in more detail the operation of the audio circuit 300 of FIG. 3, with reference to the graphs of FIGS. 4A and 4B in the case where the amplitude detection performed by the circuit 302 involves the detection of the amplitude of the input signal using envelope detection. However, in alternative embodiments, other types of amplitude detection could be used.

FIG. 4A is a graph illustrating examples of levels (LEVEL) of the audio signal x [n], of an amplitude signal corresponding to the absolute value function abs (x [n]) of the audio signal x [n], an amplitude signal E [n] after carrying out an envelope detection, during a power-up phase of an audio amplifier.

The audio signal x [n] has for example a common mode level equal to zero.

As illustrated, an envelope detection is applied so that the envelope signal E [n] follows the peaks of the signal abs (x [n]). In addition, during the power-up phase, the amplitude signal E [n] increases, for example monotonically, for example at least until a level Ljj is reached. In particular, the signal E [n] rises each time the signal of amplitude abs (x [n]) rises above its current level, and never goes down, or only goes down relatively slowly. In the example of FIG. 4A, the signal E [n] takes a time t ^ to reach the amplitude level Ljj, and this level L ^ is for example a level which is high enough to bring the common mode voltage Vq ^ 'of the audio output signal ^V OUT up to the common mode voltage level of the audio amplifier 308.

FIG. 4B is a graph showing a curve representing the output voltage Vqut of the audio amplifier. B13883

308, and a curve 402 representing the common mode level VqY of the output voltage Vout Initially, at an instant tg before the start of the audio signal, the audio amplifier 308 is switched on, but the output voltage VgUT ^is maintained initially at a low level by the output voltage of the DAC 308, for example at a level less than 1 mV or a few millivolts from the reference level of the load. For example, in the case where the audio amplifier 308 is an inverting amplifier, the output voltage of the DAC 308 is for example initially at a high level suitable for bringing the output voltage Vqut to a ground level.

Also, before the start of the audio signal, the voltage Vq _UT comprises for example a ramp portion 404, during which the output voltage is brought to a minimum common mode level VCM ^ in, so that a minimum operating level ^V MIN ^of the amplifier 102 is respected, and in particular bringing the signal level in the linear operating zone of the audio amplifier 308. In certain embodiments, this portion of ramp 404 is implemented by an offset applied to signal E [n] at the start of the audio signal. In some embodiments, the ramp portion 404 is a linear ramp. As a variant, as shown in the example in FIG. 4B, the ramp portion 404 can be a non-linear ramp having for example an exponential shape, resulting for example from a filter applied to the signal E [n], as the filter 504 of FIG. 5 described below. This ramp has a duration t ^^ starting at time tg and for example between 100 ps and 50 ms.

The range of the amplitude signal E [n] going from zero to L ^ in FIG. 4A is for example adjusted by the amplitude detection and filtering circuit 302 so that the signal CM_COMP [n] causes a variation in the level common mode Vq ^ 'of the output voltage Vq ^ from to Vq _M. Thus, at the end of the ramp 404, the voltage signal Vq ^ -j for example begins to increase on the

B13883 base of amplitude signal CM_COMP [n], just before the audio signal starts. Then, at an instant tj _s after the instant t0 substantially equal to the delay introduced by the delay element 306, the audio signal starts. For example, in one embodiment, the delay introduced by the delay circuit 306 is between 1 and 30 ms, and is for example in the range of 2 to 10 ms. The output voltage Vqu ^ then has a form equal to the sum of the audio signal x '[n] and the amplitude signal E [n]. As represented by curve 402, the common mode level Vqj ^ 'of the signal Vqut increases for example from VCM ^ in to Vq ^, or to a level located less than 1 mV or a few millivolts from V _Π.

In certain embodiments, rather than climbing only as a function of the input signal x [n], the rise in the common mode level of the output voltage signal Vqjjt can respect a minimum gradient, which is for example sufficiently low for avoid a clicking noise. An example of such a gradient is represented by a line 406 in dotted lines in FIG. 4B. If the input audio signal x [n] rises relatively slowly so that at all times the common mode level Vqm 'represented by the curve 402 is lower than the level of the dotted line 406, the common mode level Vq ^ 'goes up for example with the speed of the dotted line 406. In the example of FIG. 4B this is the case during a period 408 when the curve 402 approaches level Vq ^. Referring again to FIG. 4A, a dotted line CM_COMP _m j_ _n [n] represents the linear rise in the amplitude signal E [n] which causes the linear rise in the common mode level Vqj ^ 'represented by the dashed line 406 in Figure 4B. The signal CM_COMP [n] is for example generated by a comparison of E [n] to CM_COMP _m y _n [n], from which it follows that CM_COMP [n] is equal to E [n] unless E [n] is less than CM_COMP _m j_ _n [n], in which case CM_COMP [n] is equal to CM_COMPmi _n [n].

In the example of FIG. 4B, the audio signal stops at an instant tj_, and shortly after this instant, the output voltage. B13883

Vqut is for example brought to a low level by a descending ramp 404, generated for example by the circuit 302. In the example of FIG. 4B, the descending ramp is linear, although in other examples of waveforms different are possible.

FIG. 5 schematically illustrates an input circuit 501 according to an exemplary embodiment similar to the input circuit 301 of FIG. 3, and the similar elements bear the same references and will not be described again in detail. In the embodiment of FIG. 5, a gain circuit (GAIN) 502 is for example provided at the input of the circuit to attenuate the audio signal x [n] just before a pause in the restitution. For example, the gain is equal to an exponential function, like l_ _e -t / tc _zo ù £ _is g _e time and TC is a time constant ranging for example between 1 and 100 ms.

Furthermore, in the embodiment of FIG. 5, a low-pass filter 504 is for example used to filter the amplitude signal E [n] generated by the amplitude detection and filtering circuit 302. The filter 504 has for example a variable cutoff frequency which depends on the level of the input signal or the amplitude signal E [nJ. For example, the filter 504 receives one or more coefficients from a correspondence table (LUT) 506. The correspondence table 506 selects for example the coefficients based on the level of the input signal x [n] or the level of the amplitude signal E [n]. The filter 504 is for example an IIR filter (infinite impulse response filter), and the coefficients control for example the cutoff frequency of the filter 504, and thus the reactivity of the filter, as will now be described with reference to FIGS. 6A and 6B.

FIG. 6A is a graph illustrating the transfer function H (f) of the filter 504, which is for example at one of four levels f] _ to f4, depending on the level of the audio signal. In particular, when the audio signal level is relatively low, the low-pass filter has for example a cut-off frequency

B13883 which means that the CM_COMP [n] signal will vary relatively slowly. On the other hand, when the level of the audio signal becomes higher, the cutoff frequency gradually increases towards the levels f2, ίβ and f ^, with f4> f3> f2> fl · Of course, although in the example of FIG. 6A there are four cutoff frequencies that can be selected, in alternative embodiments there could be two selectable cutoff frequencies, or more frequencies.

FIG. 6B illustrates an example of the time constant TC of the low-pass filter 504 as a function of the level of the audio signal x [n]. As illustrated, for a minimum level MIN of the audio signal, the time constant TC is for example at a high level TCy, for example between 0.6 and 1 ms, and for a maximum level MAX of the audio signal, the time constant TC is for example at a low level TC1, for example between 10 and 100 ps. In the example of FIG. 6B, the time constant TC can be varied linearly as a function of the level of the audio signal x [n] between the minimum and maximum levels, MIN and MAX. The cut-off frequency f _c of the filter respects for example the relation fc = l / 2nTC, where TC is the time constant. The time constant TC in the example of FIG. 6B is for example of the form TC = -Bx [n] + C, and when x [n] is at the minimum level MIN, the time constant TC is for example equal at the high level TCpj, and when x [n] is at the maximum level MAX, the time constant TC is for example equal to the low level TC ^. Rather than being based on the amplitude of the audio signal x [n], in certain alternative embodiments the cutoff frequency of the filter 504 could be based on the amplitude of the signal of amplitude E [n].

An advantage of providing a filter 504 having a variable cutoff frequency is that the size of the memory implementing the delay circuit 306 can be relatively small. Indeed, a given increase in the amplitude of the incoming audio signal could cause a corresponding increase in the common mode signal that arrives before the increase in the audio signal. One solution to ensure this would be to plan a circuit

B13883 delay 306 having a relatively long delay, but that would imply a large memory. By providing a filter 504 having a variable cutoff frequency, the speed of the filter can be increased by reducing the time constant TC of the filter when the audio signal changes amplitude rapidly, thereby allowing the delay of the delay circuit 306 is relatively small.

Although in the embodiments of FIGS. 3 and 5, the functions of level detection, filtering and addition are performed by blocks 302, 303 and 304 in the digital domain either by hardware or by software, in variant embodiments, these functions could be performed in the analog domain, as will now be described in more detail with reference to FIGS. 7A and 7B.

FIG. 7A schematically illustrates an audio circuit 700 according to an exemplary embodiment similar to that of FIG. 3, and the similar elements bear the same references and will not be described again in detail. However, the DAC and amplification circuit 308 of FIG. 3 is replaced by an audio amplifier (AMP) 702 coupled to the output of the adder 304. In addition, an input circuit 701 of FIG. 7 includes the circuit 302, which in turn includes a DAC 703 generating an analog signal x (t) based on the digital signal x [n], and an analog amplitude detection and filtering circuit (ANALOG AMPLITUDE DETECTION + FILTERING) 704 for process the analog signal x (t) and generate an analog amplitude output signal E (t). The adder 303 subtracts, for example, from the signal E (t), an analog level cm corresponding to the level of the common mode voltage before the amplifier 702, and generates an analog signal of common mode compensation Vq _M coMp (t) . In addition, a DAC 706 is coupled to the output of the delay circuit 306, the DAC 706 converting the digital values x * [n] into an analog signal x '(t), which is supplied to the adder 304 to be added at the voltage COMP ^) ·. B13883

FIG. 7B illustrates the analog amplitude detection and filtering circuit 704 in more detail according to an exemplary embodiment in which it is implemented on the basis of an envelope detection using a single-wave rectifier 708. For example, a diode 712 receives on its anode the analog audio signal x (t), and has its cathode coupled to an output node 714 of the circuit providing an analog amplitude signal E (t) '. A capacitor 716 and a resistor 718 are for example coupled in parallel between the output node 714 and the ground. The current passing through the resistor 718 discharges the capacitor 716 when the voltage across the terminals of the diode 712 is lower than the threshold of the diode. When the RC time constant is relatively high, the voltage on node 714 drops only relatively slowly while the signal level x [n] is lower than the voltage on node 714 plus the diode threshold. This drop in the output voltage corresponds for example to the slope of the common mode level during the period 410 of FIG. 4B.

A low-pass filter (LPF) 720 is for example coupled to the output 714 of the single-wave rectifier 708 in order to prevent rapid changes in the common mode level, which could be audible. However, the time constant of this low-pass filter 720 is for example sufficiently short so that the delay is not greater than the delay of the delay circuit 306. In certain embodiments, the cut-off frequency of the low-pass filter 720 is variable as a function of the level of the amplitude signal E (t) 'at the output of the single-wave rectifier 708, similarly to the filter 504 of FIG. 5 described previously, which allows the size of the circuit memory delay 306 is relatively small.

FIG. 7C schematically illustrates a full-wave rectifier 750 as a variant of the single-wave rectifier 708 of FIG. 7B. The diode 712, the capacitor 716 and the resistor 718 of Figure 7B are also present in the embodiment of Figure 7C, and will not be described. B13883 again in detail. The analog audio signal is coupled to an inverting amplifier comprising a differential amplifier 752. In particular, the input node receiving the analog audio signal x (t) is coupled via a resistor 754 to a negative input of l differential amplifier 752, which is in turn coupled to a node 758 via a resistor 756. The positive input of the differential amplifier 752 is coupled to ground. The node 758 is coupled to the cathode of a diode 760 having its anode coupled to the output of the differential amplifier 752. The node 758 is further coupled to the positive input of another differential amplifier 762. The output of the other differential amplifier 762 is coupled to its negative input, and to the anode of the diode 712.

Figure 8 schematically illustrates an audio circuit 800 similar to the audio circuit 300 of Figure 3, and comprising the low-pass filter of Figure 5. However, in the embodiment of Figure 8, the DAC and amplifier circuit 308 is implemented by a DAC 802 coupled in series with an amplifier (AMP) 804. In addition, a voltage regulator (REGULATOR) 806 supplies a variable supply voltage to amplifier 804, so that the amplifier is class G or H with variable feed. The regulator 806 receives for example a signal based on the signal CM_COMP [n] from the output of the low-pass filter 504, and regulates the voltage on the basis of this signal, so that the supply voltage of 1 ' amplifier increases when the common mode voltage increases, and decreases when the common mode voltage decreases. We will now describe in more detail the operation of the audio circuit 800 of FIG. 8 with reference to the FIG.

9.

FIG. 9 is a timing diagram comprising a curve 902 illustrating an example of the level Vq _M 'of the output voltage VOUT of the amplifier 804. Arrows 904 along this curve 902 represent peaks in the amplitude of the audio signal.

B13883

A square wave 906 illustrates an example of the variable supply voltage Vyj ^ R according to an implementation of a class G amplifier. For example, the voltage starts at a low level of VDDj ^ t ^and switches to a high level of VDDf ^^ when a threshold of the input signal is exceeded. The supply voltage Vy ^ R returns for example to the level VDDj ^ T when the input signal Vpq again drops below the threshold level.

A curve 908 illustrates an example of the variable supply voltage Vy ^ R according to an implementation of a class H amplifier. For example, the variable supply voltage Vy ^ R corresponds to the envelope of the input signal Vjjq, plus a voltage shift.

It will be noted that the common mode level Vq ^ 'of the output voltage Vq _UT drops rapidly when there is no audio signal, for example in the area 910 of FIG. 9. This results for example from a relatively short RC time constant of the amplitude detection circuit, resulting for example from a reduced resistance of the resistor 718 of FIGS. 7B and 7C compared to the example of FIG. 4B.

An advantage of driving a class G or class H amplifier using an audio signal having a variable common mode level is that it is not necessary to supply a variable negative supply voltage in addition to the variable supply Vy ^ R. Furthermore, it will be clear to those skilled in the art that, although class G / H amplifiers have a common mode voltage equal to the voltage reference, they generally operate with an offset which can cause noise clicks when starting the amplifier. In addition, clicking noises can occur during changes in feeding mode. Thus, the common continuously variable mode provided by the embodiments described here will also prevent or reduce the clicking noises in such a class G / H amplifier.

FIG. 10 schematically illustrates the DAC and amplifier circuit 308 of FIG. 3 according to an exemplary embodiment

B13883 based on a DCT DAC (direct charge transfer) 1000 comprising N pairs of inputs 1001, 1002 to 1001 ', 1002' to receive bits representing the input signal y [n]. In particular, each bit is represented by an input signal at two levels REF ±.

The input nodes 1001, 1002 are respectively coupled to other nodes 1003, 1004 through respective switches 1005, 1006. The circuit 308 further comprises pairs of input capacitors C1 to CN. One of the capacitors Cl and coupled between the node 1003 and another node

1007, and the other capacitor C1 is coupled between the node 1004 and another node 1008. The node 1007 is further coupled to the positive input of a differential amplifier 1010 via a switch 1011, and the node 1008 is further coupled to a negative input of differential amplifier 1010 via a switch 1012. Node 1003 is further coupled to a negative output node 1014 of differential amplifier 1010 by through a switch 1015, and the node 1004 is further coupled to a positive output node 1016 of the differential amplifier 1010 through a switch 1017.

The input nodes 1001 ', 1002' are respectively coupled to other nodes 1003 ', 1004' via respective switches 1005 ', 1006'. One of the CN capacitors is coupled between node 1003 'and the other node 1007, and the other CN capacitor is coupled between node 1004' and the other node

1008. The node 1003 'is further coupled to the negative output node 1014 of the differential amplifier 1010 via a switch 1015', and the node 1004 'is further coupled to the positive output node 1016 of l 'differential amplifier 1010 via a switch 1017'. Although only two pairs of capacitors C1 to CN are illustrated in FIG. 10, it will be understood that there may be one or more other pairs of capacitors coupled by corresponding switches between input nodes of the circuit and the nodes 1007, 1008 .

B13883

The positive and negative inputs of the differential amplifier 1010 are also coupled to the common mode voltage Vqm via respective switches 1018 and 1020. The positive input of the differential amplifier 1010 is also coupled to the negative output. 1014 via a capacitor 1022, and the negative input of the amplifier 1010 is further coupled to the positive output 1016 of the amplifier 1010 via a capacitor 1024.

Switches 1005, 1005 ', 1006, 1006', 1018 and 1020 are controlled by a phase signal φΐ, and switches 1011, 1012, 1015, 1015 ', 1017 and 1017' are controlled by a phase signal φ2.

The differential outputs 1014, 1016 of the DAC DCT 1000 are for example coupled to a buffer for converting from differential mode to non-differential mode 1026, which in turn controls the load 104 via the coupling capacitor 112. Buffer 1026 comprises for example a resistor 1027 coupled between the node 1014 and a positive input of a differential amplifier 1028. The negative output 1030 of the amplifier 1028 is coupled to the positive input of the amplifier 1028 via a resistor 1031. The node 1016 is coupled to the negative input of the differential amplifier 1028 via a resistor 1032. The output 1030 is also coupled via a resistor 1033 to the negative input of a differential amplifier 1034, the positive input of the differential amplifier 1034 being coupled to the common mode voltage Vq / j · The output of the amplifier 1034 is coupled by the i nmediate of a resistor 1036 at the negative input of amplifier 1028. The output of amplifier 1034 is also coupled to the negative input of amplifier 1034 via a resistor 1038.

In operation, during a first phase in which the phase signal φΐ, and not the signal φ2, is activated, the input capacitors C1 to CN are charged on the basis of the

B13883 digital input signal y [n]. During a second phase during which the signal φ2, and not the signal φΐ, is activated, the capacitors of each pair Cl to CN are coupled in parallel with the capacitors 1022, 1024 respectively, and thus the output voltage of the DAC DCT 1000 is an image of the charges present on the capacitors 1022, 1024.

It will be noted that in the configuration of FIG. 10, a digital offset applied to the signal y [n] will modify the common mode level of the output voltage on the node 1030.

FIG. 11 schematically illustrates a variant of the circuit 308 of FIG. 10. In FIG. 11, to facilitate the illustration, only the input capacitors C1 and the corresponding switches are illustrated. In FIG. 11, the buffer 1026 is omitted, and instead the differential amplifier 1034 is coupled in the feedback path between the output 1016 of the amplifier 1010 and the switch 1017. In particular, the node 1016 is coupled via resistor 1033 at the negative input of amplifier 1034, and the output of amplifier 1034 is coupled to its negative input via resistor 1038. The output of amplifier 1034 drives the load 104 via the coupling capacitor 112.

With the description thus made of at least one illustrative embodiment, various alterations, modifications and improvements will readily appear to those skilled in the art.

For example, it will be clear to those skilled in the art that the supply voltages described here could have any level, and that the ground voltage could be replaced by a positive or negative voltage. Furthermore, although the common mode voltage is described as being at an intermediate point between the high and low supply voltages, other levels would be possible.

Furthermore, it will be clear to those skilled in the art that the various elements described in relation to the various embodiments could be combined, in variants of

B13883 realization, according to various combinations. For example, it will be clear to those skilled in the art that either of the circuits 308 of Figures 10 and 11 could be implemented in the audio circuit of Figure 3. In addition, it will be clear for those skilled in the art that the circuits of Figures 10 and 11 are merely examples, and that many other arrangements of the DAC and amplifier circuit could be used.

Claims (14)

1. Audio amplifier circuit, comprising: an audio amplifier (308, 702) adapted to operate at a common mode voltage level (Vq ^) and comprising an input node for receiving an audio signal (y [n], Vj ^) and an output (310) intended to be coupled to a load (104) via a coupling capacitor (112); and an input circuit (301, 501, 701) adapted to: - detecting amplitude levels of an input audio signal (x [n], x (t)) and generating a variable common mode compensation signal ^{on a} base (CM_COMP [nJ, Vq COM _M?) amplitude levels detected; and - add the variable common mode compensation signal (CM_COMP [n), Vq ^ cowp) to a delayed version (x * [n], x '(t)) of the input audio signal (x [nj) to generate the audio signal (y [n), V _IN ), the audio signal having a variable common mode level. 2. Audio amplifier circuit according to claim 1, in which during a power-up phase of the audio amplifier, the input circuit is adapted to initially adjust the variable common mode compensation signal (CM_COMP [nJ, Vq _M COMP) ^{at a} first level for bringing the output of the audio amplifier within 50 mV of a load reference level. 3. Audio amplifier circuit according to claim 2, in which the input circuit is adapted to vary the variable common mode level during the powering up of the audio amplifier from a first level to a second level, the second level being the common mode voltage ( Vq ^) of the audio amplifier. 4. An audio amplifier circuit according to claim 1, in which the input circuit (301, 501, 701) is adapted to detect the amplitude level of the input audio signal (x [nj) based on the absolute value function of the input audio signal. , B13883 5. An audio amplifier circuit according to any one of claims 1 to 4, in which the input circuit (301, 501, 701) is adapted to detect the amplitude of the input audio signal by carrying out an envelope detection. . 6. Audio amplifier circuit according to any one of claims 1 to 5, in which the input circuit (301, 501, 701) is adapted to generate the variable common mode compensation signal (CM_COMP [n], COMP ^ ^: generating an amplitude level signal abs (x [n]) representing the amplitude level of the input audio signal; and filtering the amplitude level signal using a low pass filter (504) . 7. Audio amplifier circuit according to claim 6, comprising a control circuit (701) adapted to control the cut-off frequency of the low-pass filter (504) as a function of the level of the input audio signal (x [nj) or of a detected amplitude level ( E [nJ) of the input audio signal. 8. Audio amplifier circuit according to claim 7, in which the control circuit is adapted to control the time constant of the low-pass filter (504, 716) so that it is inversely proportional to the level of the input audio signal (x [n]) or to a detected amplitude level (E [nJ) of the input audio signal. 9. An audio amplifier circuit according to claim 7 or 8, further comprising a delay circuit (306) adapted to generate the delayed version (x '[n], x' (t)) of the input audio signal (x [ nj) by introducing a delay equal to at least the delay introduced by the low-pass filter (504, 716). 10. An audio amplifier circuit according to any one of claims 1 to 9, in which the input circuit (701) comprises a digital-analog converter (703) adapted to convert the audio input signal (x [nj) into an analog signal (x (t)), and an analog circuit (704) adapted to detect the amplitude levels of the input audio signal (x [n], x (t)) and to generate the signal for compensation of variable common mode B13883 (CM_COMP [nJ, Vq4 C0Mp) based on the detected amplitude levels. 11. Audio amplifier circuit according to claim 10, wherein the analog circuit includes a full wave rectifier (708) or a full wave rectifier (750). 12. An audio amplifier circuit according to claim 1, further comprising a digital analog converter separate from, or integrated with, the audio amplifier (308) and adapted to convert the audio signal (y [n]) as an analog audio signal (Vj ^). 13. An audio amplifier circuit according to any one of claims 1 to 12, wherein the audio amplifier (308) is a class G or class H audio amplifier having a variable supply voltage based on the compensation signal. variable common mode (CM_COMP [n], COMP) · 14. Process comprising: generate an audio signal (y [n], Vpq) to drive an audio amplifier (308) adapted to operate at a common mode voltage level (Vqm) and having an input node to receive the audio signal (y [n ], Vj _N ) and an output (310) coupled to a load (104) via a coupling capacitor (112), the generation of the audio signal comprising: - detect amplitude levels of an input audio signal (x [n], x (t)) and generate a variable common mode compensation signal (CM_COMP [n], V _CM COM?) on ^the basis amplitude levels detected; and - add the variable common mode compensation signal (CM_COMP [n], Vqm COMP) ^{to a} delayed version (x '[n], x' (t)) of the input audio signal (x [n]) to generate the audio signal (y [n), V ^), the audio signal having a variable common mode level.