FR3063849A1 - METHOD FOR CONTROLLING A SWITCHING ARM WITH AT LEAST TWO DOUBLE-GRID POWER TRANSISTORS AND CONTROL SYSTEM FOR CARRYING OUT SAID METHOD - Google Patents

Abstract

The invention relates to a method for controlling a switching arm comprising at least a first bidirectional transistor (TH1) with two gate electrodes and a bidirectional second transistor (TL1) with two gate electrodes connected in series with a source of power supply supplying an alternating input voltage (Ve) comprising at least one positive voltage alternation followed by a negative voltage alternation and controlled to provide an output voltage at an electrical load (C) to be traversed by a current charge signal (lc) and connected in parallel with the second transistor, said first transistor (TH1) comprising a first gate electrode (G1h), a second gate electrode (G1l), and the second transistor comprising a first gate electrode (G2h) ), a second gate electrode (G2I), each gate electrode of each transistor being in a first state or in a second state.

Description

Holder (s): COMMISSION FOR ATOMIC ENERGY AND ALTERNATIVE ENERGY Public establishment, RENAULT S.A.S. Simplified joint-stock company.

Extension request (s)

Agent (s): INNOVATION COMPETENCE GROUP.

METHOD FOR CONTROLLING A SWITCHING ARM WITH AT LEAST TWO DOUBLE-GRID POWER TRANSISTORS AND CONTROL SYSTEM FOR IMPLEMENTING SAID METHOD.

FR 3 063 849 - A1 (5 /) The invention relates to a method for controlling a switching arm which comprises at least a first bidirectional transistor (TH1) with two gate electrodes and a second bidirectional transistor (TL1) with two gate electrodes connected in series to a power source providing an alternating input voltage (Ve) comprising at least one positive voltage alternation followed by a negative voltage alternation and controlled to supply an output voltage to an electric load (C) intended to be crossed by a load current (le) and connected in parallel to the second transistor, said first transistor (TH1) comprising a first gate electrode (G 1 h), a second gate electrode (G 11) , and the second transistor comprising a first gate electrode (G2h), a second gate electrode (G2I), each gate electrode of each transistor possibly being in a first state or d in a second state.

Method for controlling a switching arm with at least two double gate power transistors and control system for implementing said method

Technical field of the invention

The present invention relates to a method for controlling a switching arm with at least two double gate power transistors and to the control system intended to implement said method.

State of the art

The Gallium Nitride (GaN) power transistor is known to be a component which has certain advantages, in particular a low resistance in the on state making it possible to cause few losses and an ability to operate at high frequencies.

This transistor has a structure obtained by the epitaxy growth of GaN layers on a silicon substrate. More specifically, the HEMTs (or High Electron Mobility Transistor in the English literature) high-electron field effect transistors, based on the AIGaN / GaN heterojunction, have demonstrated excellent performance.

Recently, it has been proposed to produce, on a single chip, such a bidirectional transistor with two separate gates. Patent application WO2009 / 153965A1 describes such a component and its use in a variable speed drive for the control of an electric motor.

FIG. 1 is a diagram representing a vertical section of a HEMT AIGaN / GaN lateral transistor with double gate and common drain. This component is produced from a silicon substrate 100 as a support, a channel layer 101 of GaN, and a barrier layer 102 of Aluminum Gallium Nitride AIGaN forming a heterojunction with the GaN layer. . These two semiconductor layers have different forbidden bands which form a quantum well at their interface. Electrons are confined in this quantum well to form a two-dimensional electron gas (2DEG) which constitutes the channel located at the AIGaN / GaN interface on the GaN side. The epitaxy thus obtained receives two ohmic electrodes S1 and S2 spaced laterally. Two control electrodes, commonly called grids, respectively Gh and Gl, are arranged between the two ohmic electrodes S1 and S2. Depending on the common drain architecture chosen, current and voltage are therefore managed by a single channel, which optimizes the specific resistance and the cost of the component.

Even if the use of such transistors in power converters such as variable speed drives has already been mentioned in the prior art, no strategy for controlling a switching arm provided with several of these double bidirectional transistors grid has been described.

However, it turns out that there is a need to propose a control strategy adapted to this type of component in its use in a switching arm, in particular for:

Avoid short-circuiting the voltage source, even for a short time;

Always provide a path so that the current in the load (often inductive) can loop back, even for a short time;

- Manage the polarity reversal of the voltage source;

The object of the invention is therefore to propose a method for controlling bidirectional double gate transistors associated in series in a switching arm, which makes it possible to meet the objectives set above.

Statement of the invention

This object is achieved by a method of controlling a switching arm which comprises at least a first bidirectional transistor with two gate electrodes and a second bidirectional transistor with two gate electrodes connected in series to a power source supplying a voltage. an input input comprising at least one alternating positive voltage followed by alternating negative voltage and controlled to supply an output voltage to an electric load intended to be crossed by a load current and connected in parallel with the second transistor, said second first transistor comprising a first gate electrode, a second gate electrode, and the second transistor comprising a first gate electrode, a second gate electrode, each gate electrode of each transistor may be in a first state or in a second state , each transistor being controlled so that when :

- Its first gate electrode is in the first state and its second gate electrode in the first state, the transistor is in the open state,

The first gate electrode and the second gate electrode are in different states, the transistor is in a diode operating mode, the diode operating mode being reverse diode or direct diode depending on the state of each gate electrode,

- Its first gate electrode is in the second state and its second gate electrode is in the second state, the transistor is in the closed state, During each alternation of positive or negative voltage, said method follows the following sequence:

o When the first transistor is switched from the closed state to a diode operating mode, the diode operating mode is chosen to ensure natural conduction of the second transistor according to a freewheeling diode operating mode;

o When the first transistor is switched to the diode operating mode, the second transistor is in a diode operating mode chosen to loop back the charging current and ensure the continuity of the charging current in freewheeling mode;

o When the second transistor is switched from the diode operating mode to the closed state, the first transistor is maintained in its diode operating mode.

According to a particular embodiment, when the voltage alternation is positive, the first transistor being initially in the closed state and the second transistor initially in the diode operating mode, the method consists in following the following sequence:

o Order the first transistor in the diode operating mode, o After a dead time, order the second transistor in the closed state, o Order the second transistor in the diode operating mode, o After a dead time, order the first transistor in the closed state.

According to this embodiment, when the voltage alternation is negative, the first transistor being initially in the closed state and the second transistor initially in the diode operating mode, the method consists in following the following sequence:

o Order the first transistor in the diode operating mode, o After a dead time, order the second transistor in the closed state, o Order the second transistor in the diode operating mode, o After a dead time, order the first transistor in the closed state.

According to one feature, the method comprises a step of detecting the alternation of the input voltage supplied by said power source.

The invention also relates to a control system for a switching arm which comprises at least a first bidirectional double gate transistor and a second bidirectional transistor with two gate electrodes connected in series to a power source supplying a voltage of alternating input comprising at least one alternating positive voltage followed by alternating negative voltage and controlled to supply an output voltage to an electric load intended to be crossed by a charging current and connected in parallel with the second transistor, said first transistor comprising a first gate electrode, a second gate electrode, and the second transistor comprising a first gate electrode, a second gate electrode, each gate electrode of each transistor may be in a first state or in a second state, each transistor being controlled so that when:

- Its first gate electrode is in the first state and its second gate electrode is in the first state, the transistor is in the open state, The first gate electrode and the second gate electrode are in different states, the transistor is in a diode operating mode, the diode operating mode being reverse diode or direct diode depending on the state of each gate electrode,

- Its first gate electrode is in the second state and its second gate electrode is in the second state, the transistor is in the closed state, said system comprising:

Processing means arranged to execute instructions for applying at least one determined command sequence;

Data acquisition means used as inputs for applying said command sequence;

Control means receiving commands from the processing means and arranged to apply control signals to the gates of the transistors of the switching arm according to the control sequence which is applied;

During each alternation of positive or negative voltage, said system is capable of controlling the following command sequence:

o When the first transistor is switched from the closed state to a diode operating mode, the diode operating mode is chosen to ensure natural conduction of the second transistor according to a freewheeling diode operating mode;

o When the first transistor is switched to the diode operating mode, the second transistor is in a diode operating mode chosen to loop back the charging current and ensure the continuity of the charging current in freewheeling mode;

o When the second transistor is switched from the diode operating mode to the closed state, the first transistor is maintained in its diode operating mode.

According to a particular embodiment, when the alternation of voltage is positive, the first transistor being initially in the closed state and the second transistor initially in the diode operating mode, said system is able to implement the following sequence:

o Order the first transistor in the diode operating mode, o After a dead time, order the second transistor in the closed state, o Order the second transistor in the diode operating mode, o After a dead time, order the first transistor in the closed state,

According to this particular embodiment, when the voltage alternation is negative, the first transistor being initially in the closed state and the second transistor initially in the diode operating mode, said system is capable of implementing the following sequence:

o Order the first transistor in the diode operating mode, o After a dead time, order the second transistor in the closed state, o Order the second transistor in the diode operating mode, o After a dead time, order the first transistor in the closed state.

According to one feature, the system includes means for measuring the voltage supplied by said power source.

The invention also relates to a computer program comprising software instructions intended to be executed on a computer to implement the method as defined above.

Finally, the invention relates to a storage medium readable by a computer comprising the computer program defined above.

The presence of two grids allows the component to block a voltage whatever its sign and to conduct current in both directions. It will be seen that this characteristic makes it possible to carry out functions for direct conversion from an alternating voltage to another alternating voltage (for example in the context of a variable speed drive from the three-phase network or of an isolated charger which supplies the transformer insulation directly from the supply network) with a significantly higher power density and efficiency than with conventional topologies.

Brief description of the figures

Other characteristics and advantages will appear in the following detailed description given with reference to the appended drawings in which:

FIGS. 1A and 1B represent a field effect transistor with high electronic mobility, with double gate and with common drain, known in the state of the art, respectively seen according to a schematic section and seen in the form of its electronic symbol;

Figure 2 illustrates the different states taken by a bidirectional double gate transistor as shown in Figure 1;

FIG. 3 represents an electronic diagram of a switching arm with two bidirectional double gate transistors in series as shown in FIG. 1, connected to a power source and controlled to supply an electrical load;

FIGS. 4A and 4B represent timing diagrams illustrating the control sequences applied to the switching arm of FIG. 3;

Figures 5A and 5B illustrate the different phases of the control sequences shown in Figures 4A and 4B;

FIG. 6 represents curves illustrating the control sequences of FIGS. 4A and 4B;

FIG. 7 represents the topology of a dual-bridge converter Dual Active Bridge of the single-phase type, with two switching arms such as that of FIG. 3;

FIG. 8 represents the topology of a three-phase type Dual Active Bridge converter with three switching arms such as that of FIG. 3;

FIG. 9 represents a timing diagram illustrating the control sequence applied to a switching bridge of the converter of FIG. 7;

Figure 10 illustrates the different phases of the control sequence shown in Figure 9;

FIG. 11 illustrates the principle of aid for blocking a transistor used in a converter of the invention;

Detailed description of at least one embodiment

As already described above, a high electron mobility field effect transistor (HEMT) made of Gallium Nitride (hereinafter GaN) on silicon substrate with two separate gates and with common drain is represented in FIGS. 1A and 1B In general but not limiting and for the needs of the invention, such a transistor has the following particularities:

A silicon substrate;

A GaN layer formed by epitaxy on the silicon substrate, through a specific buffer layer (typically AIN) in order to ensure the integrity of the crystal structure of GaN;

A barrier layer formed by epitaxy on the GaN layer, so as to form a conduction channel at the interface of the GaN layer and the barrier layer;

Two opposite source electrodes S1, S2;

Two control electrodes, also called gate electrodes Gh, Gl, produced on the barrier layer and formed between the two source electrodes S1, S2 so as to modulate the conductance in the conduction channel between the two source electrodes S1, S2 ;

The common drain structure only increases the size of the component by a gate-source length compared to a single gate transistor (approximately 10% of additional active area for a blocking voltage of 600V, i.e. 2pm for a length of 17 at 6pm classically).

In such a transistor, the first gate electrode (Gh) and the second gate electrode (Gl) are each capable of taking two distinct states, called first state and second state. In a nonlimiting manner, the first state is a state 0, that is to say that the grid is inactive and the second state is a state 1, that is to say that the grid is active.

The invention is described below with transistors of the normally open type (normally off), that is to say in the open state in the absence of control voltage on the grid but it should be understood that it could be applied with transistors of the normally closed type (normally on), that is to say in the closed state in the absence of control voltage on the gate.

With reference to FIG. 2, depending on the state taken by each of its gate electrodes Gh and Gl, the transistor can take the four distinct states or operating modes described below:

State A: First gate electrode Gh in state 0 and second gate electrode Gl in state 0, the transistor is in the open state;

State B: First gate electrode Gh in state 1 and second gate electrode Gl in state 0, the transistor is in a reverse diode operating mode;

State C: First gate electrode Gh in state 0 and second gate electrode Gl in state 1, the transistor is in a direct diode operating mode;

State D: First gate electrode Gh in state 1 and second gate electrode Gl in state 1, the transistor is in the closed state;

In such a GaN-based double-gate component, the diode operating mode is performed automatically with natural conduction of the component in reverse mode when it is blocked.

These four states A, B, C, D thus allow operation in the four quadrants, that is to say:

- Positive or negative voltage to block between electrodes S1 and S2;

- Current flow in both directions between the electrodes S1 and S2;

- Choice of the freewheeling direction according to the sign of the voltage to be blocked between the electrodes S1 and S2;

With reference to FIG. 3, the invention applies in particular to a switching arm which comprises two bidirectional TH1, TL1 transistors with double gate as described above, connected in series to a power source supplying a voltage d alternative entry Ve. The first transistor TH1 has a first gate electrode G1 h and a second gate electrode G11 and the second transistor TL1 has a first gate electrode G2h and a second gate electrode G2I. The two transistors TH1, TL1 are controlled to convert said input voltage Ve into an output voltage Vc supplied to an electrical load C, for example connected in parallel to the second transistor TL1. The power source provides an alternating voltage, advantageously sinusoidal, comprising a succession of patterns, each pattern comprising alternating positive voltage followed by alternating negative voltage. The voltage Ve is for example the voltage supplied by the electrical network at a frequency of 50Hz or 60Hz.

Taking into account the different states described above that each double gate transistor can take, the invention aims to propose a control method adapted to such a switching arm which makes it possible to fulfill certain objectives, in particular:

Avoid short circuiting the power source, even for a short time;

Always offer a path so that the current present in the load (which is often inductive) can loop back, even for a short time;

Manage the reverse polarity of the power source;

FIGS. 4A and 4B represent two timing diagrams illustrating the principle of the control method of the invention. The first timing diagram is applied when the input voltage supplied by the power source is in positive alternation (Ve> 0) and the second timing diagram is applied when the input voltage supplied by the power source is in a positive negative alternation (Ve <0).

FIGS. 5A and 5B represent the different states of the switching arm, respectively by following the timing diagram of FIG. 4A and the timing diagram of FIG. 4B. In FIGS. 5A and 5B, a transistor in the closed state is indicated by a continuous circuit branch and a transistor in a diode operating mode, reverse or direct, is represented in the form of a diode oriented in the corresponding direction to its operating mode and referenced with the prefix D (DH1 or DL1).

The control method is applied by following a clock signal H enabling the commands applied to the gates of the two transistors of the switching arm to be sequenced, whether when the alternation of the input voltage is positive or negative. The clock signal H can take two distinct states 0 or 1.

According to one aspect of the invention, the method notably consists in ensuring that, during each alternation of the input voltage, each transistor of the switching arm has one of its two gates kept active and the other of its two grids switched to one or other of its two states (active or inactive).

The method of the invention is implemented by a system which comprises in particular:

- processing means comprising a microprocessor and storage means and arranged to execute software instructions to apply at least one determined command sequence; the software instructions are stored in said storage means and are part of said control system;

- Data acquisition means, in particular voltage data (voltage Ve for example) and / or current, for example by measurement, used as inputs for applying the command sequence;

- control means receiving commands from the processing means and arranged to apply control signals to the gates of the transistors of the switching arm according to the control sequence which is applied; these control means include in particular piloting units (driver) adapted to control the gates of the transistors.

In a more precise but non-limiting manner, with reference to FIG. 4A and to FIG. 5A, when the input voltage is in a positive half-wave, Ve> 0, the processing means mentioned above implement the following sequence :

The gate electrodes G1 h and G2h are kept active, that is to say in state 1 throughout the duration of the alternation. Switching is then applied to the other two gate electrodes, i.e. G1I and G2I.

- From tO, H = 1 - The gate electrode G1I is initially in state 1 and the gate electrode G2I is in state 0. The first transistor TH1 is thus in state D, c is to say closed and the second transistor TL1 is in state B, that is to say in a reverse diode operating mode. The output voltage Vc generated by the switching arm is therefore Vc = Ve and the current increases, allowing the electrical load C.

- From t1, H = 0 - The gate electrode G11 goes to state 0 and the gate electrode G2I stays in state 0. The first transistor TH1 and the second transistor TL1 are each in the state B, that is to say in the reverse diode operating mode. The output voltage is canceled, Vc = 0. The current decreases. When TH1 goes into reverse diode operation, the transistor TL1 naturally places itself in freewheeling, making it possible to loop the current le.

- From t2, H = 0 - After a dead time dT, the gate electrode G2I is controlled in state 1. The gate electrode G1I is always in state 0. The first transistor TH1 is therefore always in state B, that is to say in the reverse diode operating mode and the second transistor TL1 is switched to state D, that is to say in the closed state. The voltage Vc remains zero, Vc = 0 and the current continues to decrease.

- From t3, H = 1 - The gate electrode G2I goes to state 0. The gate electrode G1I remains inactive at state 0. The first transistor TH1 and the second transistor TL1 are therefore at l state B, that is to say in reverse diode operating mode. The transistor TL1 is thus put back into reverse diode operation to prepare for the next switching of the transistor TH1.

- From t4, H = 1 - After a dead time dT, the gate electrode G1I is controlled in state 1. The gate electrode G2I is kept inactive in state 0. The first transistor TH11 is therefore switched to state D, that is to say in the closed state and the second transistor TL1 is in state B, that is to say in the reverse diode operating mode.

With reference to FIG. 4B and to FIG. 5B, when the input voltage is in negative alternation, Ve <0, the processing means apply the following sequence:

The gate electrodes G1I and G2I are kept active, that is to say in state 1 throughout the duration of the alternation. Switching is then applied to the other two gate electrodes, i.e. G1h and G2h.

- From tO, H = 1 - The gate electrode G1h is initially in state 1 and the gate electrode G2h is in state 0. The first transistor TH1 is thus in state D, c is to say closed and the second transistor TL1 is in state C, that is to say in a direct diode operating mode. The output voltage Vc generated by the switching arm is therefore Vc = Ve and the current le is negative. The absolute value of the current increases it.

- From t1, H = 0 - The gate electrode G1 h goes to state 0 and the gate electrode G2h remains in state 0. The first transistor TH1 and the second transistor TL1 are each in l state C, that is to say in the direct diode operating mode. The output voltage is canceled, Vc = 0. The absolute value of the current decreases it. When TH1 goes into direct diode operation, the transistor TL1 naturally places itself in freewheeling, making it possible to loop the current le.

- From t2, H = 0 - After a dead time dT, the gate electrode G2h is controlled in state 1. The gate electrode G1h is always in state 0. The first transistor TH1 is therefore always in state C, that is to say in the direct diode operating mode and the second transistor TL1 is switched to state D, that is to say in the closed state. The voltage Vc remains zero, Vc = 0. The absolute value of the current decreases it.

- From t3, H = 1 - The gate electrode G2h goes to state 0. The gate electrode G1 h remains inactive at state 0. The first transistor TH1 and the second transistor TL1 are therefore at state C, that is to say in direct diode operating mode. The transistor TL1 is therefore put back into direct diode operation to prepare the next switching of the transistor TH1.

- From t4, H = 1 - After a dead time dT, the gate electrode G1 h is controlled in state 1. The gate electrode G2h is kept inactive in state 0. The first transistor TH1 is therefore switched to state D, that is to say in the closed state and the second transistor TL1 is in state C, that is to say in the direct diode operating mode. The absolute value of the current increases it.

The duration of each dead time dT is adapted to ensure that each new switching of a transistor to state D occurs while the other transistor is no longer in this state D, avoiding any short-circuiting of the power supply.

The duration of the dead time is adapted so as to be short enough so as not to affect the yield too much but long enough to avoid any short-circuiting of the voltage source.

Advantageously and to make the control more robust, the control sequence can integrate, during a change of alternation of the input voltage Ve (from a positive alternation to a negative alternation or from a negative alternation to positive alternation), a control in the inactive state of all the gates of the transistors of the switching arm. For the alternation which begins (negative or positive), it is then a question of ensuring that the current is indeed zero before applying the command sequence provided for this alternation. This makes it possible to avoid short-circuiting the power source supplying the voltage Ve and to take account of possible measurement errors on the voltage Ve.

Of course, for control purposes, the system may include means for measuring the input voltage and detection means will be necessary to know whether the input voltage is in positive alternation or in negative alternation and thus apply the appropriate command sequence.

FIG. 6 illustrates the variation of the output voltage Vc and of the current le according to the state taken by the two gate electrodes G1I and G2I in switching mode, the other two gate electrodes G1h and G2h being saturated, that is to say say in state 1. It is therefore the control strategy described above when Ve is greater than 0, in connection with FIGS. 4A and 5A.

The control method described above in conjunction with the timing diagrams therefore makes it possible to meet the various aforementioned objectives, that is to say:

- No risk of short-circuit: the duration of each dead time dT is defined so as to never have two simultaneous switches, despite the dispersal of the characteristics of the components;

The current le in the load always has a path to loop back, thanks to the state B or C taken by the transistor, before the next switching;

The method takes into account the polarity of the input voltage Ve, with two symmetrical strategies when the alternation of voltage is positive or negative; It suffices to reverse the commands between Gh and Gl of the same transistor;

The operating time in diode mode is interrupted to saturate the transistor in order to reduce its conduction losses; only the switches are made in diode mode;

The efficiency of the switching arm can be easily optimized by limiting the duration of the dead time dT to the maximum;

The control strategy is compatible with operation at zero voltage switching (ZVS) on resonant load (see below);

The strategy or sequence of control of the switching arm described above is particularly advantageous for applying to converters comprising several switching arms of this type.

This is particularly the case for converters used in on-board battery charger (Batt) type applications for electric traction vehicles or in applications which require the supply of continuous and / or high voltage output from the network. single-phase or three-phase domestic electrics that do not necessarily require two-way electrical energy exchanges. For example, this is particularly the case for the following other applications:

- Supply of vacuum tubes (X-rays, Microwaves);

- Laser supply;

- Contactless energy transmission not inductive coupling;

- Backup power systems (UPS), especially for computer servers;

More specifically, in an application of the on-board battery charger type for an electric traction vehicle, it turns out that the use of switching arms as described above based on bidirectional double gate transistors, makes it possible to respond to the following current functional requirements:

Reduce the volume, increasing the power density, by eliminating an input rectification stage;

- Ensure bidirectional operation, the battery being able to discharge in the electrical network (Smart Grid type systems);

- Improve the conversion efficiency over the entire operating range, this being necessary for the return of energy to the network;

Reduce the cost of the charger, by minimizing the quantity of semiconductor components and increasing the switching frequency, thus making it possible to reduce the size of the filters and of the transformer;

Reduce radiated and conducted electromagnetic disturbances on the electrical network, so as to be particularly compatible with isolated neutral electrical networks.

In an application of a charger type converter as described above, the realization of a converter provided with switching arms as described above and each controlled according to the strategy developed above makes it possible to implement a direct conversion AC / AC, that is to say directly converting the alternating voltage supplied by an electrical power source such as for example the electrical network without going through a conventional rectification stage.

Based on several parallel switching arms, each provided with at least two bidirectional double gate transistors in series, several charger topologies can be envisaged.

Figure 7 presents a topology of single-phase converter used in a charger which is particularly interesting. Figure 8 shows the three-phase variant of this topology.

The converter thus presents an isolated double bridge topology (also called DAB for Dual Active Bridge) which comprises the following elements:

A transformer 3 comprising two first terminals between which is connected a primary winding, and two second terminals between which is connected a secondary winding.

A first switching bridge 20 AC / AC connected to the primary winding of the transformer. It comprises two switching arms (in single-phase version) of the type described above and represented in FIG. 3 and intended to convert the alternating voltage Ve supplied at input by the source into an alternating voltage or vice versa. Each switching arm comprises at least two transistors and a connection midpoint located between its two transistors. The first connection midpoint is connected to one terminal of the transformer primary winding and the second connection midpoint is connected to the other terminal of the transformer primary winding. Between the two connection medium points, the voltage V0 is generated.

A second switching bridge 21 of AC / DC type connected to the secondary winding of the transformer 3. It comprises two supply lines between which a DC voltage is applied and two switching arms connected between the two supply lines and intended to convert an AC voltage into a DC voltage or vice versa. Each switching arm has at least two switches and a connection point between its two switches. The first connection midpoint is connected to one terminal of the secondary winding of the transformer and the second connection midpoint is connected to the other terminal of the secondary winding S of the transformer.

Optionally, a resonant circuit on the so-called AC link on the primary side, that is to say connected between the output of the first switching bridge 20 and the primary winding of the transformer 3 and which includes a resonance capacitor Cr in series with inductance Lr.

Advantageously, a common and differential mode input filtering stage 4 positioned between the alternating voltage source and the first switching bridge, conventionally comprising inductors and filtering capacitors.

Advantageously, an output filtering stage 5 connected between the second switching bridge and the Batt battery or the set of batteries.

For controlling the switching arms, the converter advantageously includes a suitable control system which includes:

- processing means comprising a microprocessor and storage means and arranged to execute software instructions to apply at least one determined command sequence; the software instructions are stored in said storage means and are part of said control system;

- Data acquisition means, in particular voltage data (voltage Ve for example) and / or current, for example by measurement, used as inputs for applying the command sequence;

- control means receiving commands from the processing means and arranged to apply control signals to the gates of the transistors of each switching arm of the converter according to the control sequence which is applied; these control means include in particular piloting units (driver) adapted to control the gates of the transistors.

To carry out the direct AC / AC conversion, the first switching bridge 20 comprises bidirectional double gate transistors, forming the subject of the invention and referenced TH1, TL1 for the first switching arm and TH2, TL2 for the second arm of commutation. In the second switching bridge 21, the transistors can be of all types, for example unidirectional voltage and bidirectional current transistors of the IGBT type or of the field effect type (FET). In the latter case, it will for example more particularly be MOSFET or JFET type transistors. It could for example be MOSFET transistors made of silicon carbide.

Depending on the command applied, power transfer can be carried out from the source to the load or from the load to the source.

With reference to FIG. 8, in its three-phase variant, the first switching bridge comprises an additional switching arm, identical to the first two and comprising the transistors TH3 and TL3. In this variant, the three input phases connected to the electrical power source are connected separately to the three midpoints of the three switching arms and the three switching arms are connected in parallel with the primary winding P of the transformer. 3.

According to another variant embodiment, not shown, the resonant circuit may be distributed over the primary and over the secondary of the transformer. This configuration does not change the control which will be described below.

The control strategy described above for the switching arm shown in FIG. 3 thus applies similarly to the switching arms of a converter as shown in FIGS. 7 or 8.

When the converter is of the single-phase type as shown in FIG. 7, it is simply a question of carrying out a so-called full wave control, that is to say on a diagonal between the two switching arms, so that the switching at the closed state of the transistor TH1 of the first switching arm is accompanied by switching to the closed state of the transistor TL2 of the second switching arm and then applying a command symmetrically for the transistors TH2 and TL1.

The resonant circuit, composed of the inductance Lr and the capacitor Cr connected in series, is advantageously tuned to a frequency lower than that at which the transistors switch, which ensures operation in ZVS (Zero Voltage Switching), c that is to say an operation in which the switching operations are carried out at zero voltage. There is thus an ignition of each transistor at zero voltage when it conducts in reverse (freewheeling diode mode), which makes it possible to have zero ignition energy (no loss by switching during the transition to the state D which has been defined above).

Figures 9 and 10 illustrate the different stages of operation of the converter of Figure 7 in so-called ZVS operation. In FIG. 10, a transistor in the closed state (state D) is indicated by a continuous circuit branch and a transistor in a diode operating mode, reverse or direct, is represented in the form of a diode oriented in the meaning corresponding to its operating mode and referenced with the letter D (DH1, DL1, DH2, DL2)

The voltage Ve supplied by the source oscillates between E and -E. When the voltage Ve is in positive alternation, the sequence is as follows:

Between X1 and X2, the transistors TH1 and TL2 are in state D. The voltage VO (obtained at the output of the first switching bridge 20) is equal to E and the current I0 which flows through the primary of the transformer is positive therefore flows in the transistors TH1 and TL2. The other two transistors TL1 and TH2 are in state B, that is to say in reverse diode mode.

- At X2, reached after half a period, the transistors TH1 and TL2 are controlled towards state B, that is to say in reverse diode mode.

Between X2 and X3, the current I0 being always positive, it flows through the freewheeling diodes of the transistors TL1 and TH2. The voltage V0 reverses and then equals -E. Therefore, the voltage seen by the transistors TH2 and TL1 is zero. During this freewheeling phase, the transistors TL1 and TH2 are switched on. Between X3 and X4, the current then naturally reverses (thanks to the resonant circuit) and becomes negative. It goes through the transistors TH2 and TL1, without switching losses because these transistors have already been switched on during the previous phase.

- At X4, after half a period, the transistors TH2 and TL1 are controlled in state C, that is to say in direct diode mode.

Between X4 and X5, the current I0 being always negative, it flows through the freewheeling diodes of the transistors TH1 and TL2. During this freewheeling phase, the transistors TH1 and TL2 are again switched on, to return to the initial phase.

It should be noted that since the current in the source suddenly changes sign (at the speed of di / dt in the components), a filtering capacitor (conventionally called DC-Link) is advantageously positioned at the input of the first bridge of switching, in the filtering stage 4.

When the input voltage Ve is in negative alternation, the various phases described above are implemented symmetrically, as for the description given above of the control sequence of the switching arm.

Advantageously, as already described above for the control sequence applied to the switching arm, the control sequence applied to the converter can integrate, during a change of alternation of the input voltage Ve (of a positive alternation towards a negative alternation or from a negative alternation towards a positive alternation), a control in the inactive state of all the gates of the transistors of the switching arm. For the alternation which begins (negative or positive), it is then a question of ensuring that the current in the primary is indeed zero before applying the command sequence provided for this alternation. This makes it possible to avoid short-circuiting the power source supplying the voltage Ve and to take account of possible measurement errors on the voltage Ve.

The converter based on bidirectional double gate transistors and the operating sequence described above have the following advantages in particular:

High power density thanks to the elimination of a conversion stage and passive storage (typically the DC capacity at the output of a PFC stage);

- Cost greatly reduced, through the use of a minimum of semiconductor components (removal of a conversion stage, and the addition of a 2nd grid on a GaN component results in only a small increase in the surface (ie the cost) of the component) on the one hand, and the increase in the switching frequency which makes it possible to reduce the volume (and therefore the cost) of the passive components on the other hand.

Resonant switching of the ZVS type which makes it possible to avoid an increase in losses linked to the dynamic resistance of the GaN type components, and therefore to ensure electronic losses independent of the switching frequency. The switching frequency results from an optimum conditioned by the passive components independently of the semiconductors.

The use of complete switching bridges (in Ή ') associated with soft switching of the ZVS type allows a great mutism of the common mode disturbances (full bridges) and radiated (ZVS switching limits the voltage fronts (dV / dt) and current (di / dt) during switching.

In addition, it is also possible to obtain the following advantages:

The transformer, due to the impedance of the LC type resonant circuit, is supplied by a quasi-sinusoidal current whose low harmonic rate minimizes the iron losses in the magnetic core and the joules losses by skin effect in the windings .

The primary winding of the transformer necessarily implies the presence of a magnetizing inductance (not shown in Figures 7 and 8) which ensures amplification, thanks to the LLC circuit thus formed, of the network voltage on the primary of the transformer over a spectrum of given frequency and at low electrical load. This property makes it possible to draw current even when the voltage of the battery to be charged is higher than that of the network within the limit of the amplification allowed by the LLC circuit.

- The transistor can be blocked by diverting the current to be cut into a parallel capacitance (Cap) between each drain, as shown in Figure 11. This capacitance can be the only output capacity of the transistor as an added real component (l priming is done at zero voltage, this increase in capacity will not cause any disturbance). There will thus be an extremely low blocking energy while controlling the voltage front at a satisfactory level.

- In the event that the input voltage is too low to absorb a current on the network, the secondary switching bridge of the transformer applies a voltage in phase opposition so as to control the current drawn from the network.

If you wish to discharge the battery in the network, the reverse operation must be applied. The secondary bridge of the transformer imposes the voltage on the primary of the transformer on which the command of the switching bridge to the primary is synchronized with a control of the current injected into the network similar to that applied under load: the frequency variation and the phase are controlled (in phase or opposition) between the two bridges.

The different aspects of driving the transistor grids in the switching arms thus have a certain number of advantages which have been described above, in particular:

Avoid short-circuiting the voltage source;

Always suggest a path to loop back the charging current, which is essential when the charge is inductive;

- Manage the polarity reversal of the voltage source;

Allow use in a converter having a topology such as those described above, in particular allowing operation in ZVS;

Furthermore, it should be understood that the control solutions proposed above can of course be addressed to embodiments which differ from one another by the number of transistors per switching arm, by the number of switching arms, regardless of the electrical charge connected downstream.

Claims (10)

1. Method for controlling a switching arm which comprises at least a first bidirectional transistor (TH1) with two gate electrodes and a second bidirectional transistor (TL1) with two gate electrodes connected in series to a power source providing an alternating input voltage (Ve) comprising at least one positive voltage alternation followed by a negative voltage alternation and controlled to supply an output voltage to an electric charge (C) intended to be crossed by a charging current ( le) and connected in parallel with the second transistor, said first transistor (TH1) comprising a first gate electrode (G1h), a second gate electrode (G11), and the second transistor comprising a first gate electrode (G2h), a second gate electrode (G2I), each gate electrode of each transistor possibly being in a first state or in a second state, each transistor is nt ordered so that when: - Its first gate electrode (G1h, G2h) is in the first state and its second gate electrode (G 11, G2I) in the first state, the transistor is in the open state, The first gate electrode (G1 h, G2h) and the second gate electrode (G11, G2I) are in different states, the transistor is in a diode operating mode, the diode operating mode being reverse diode or direct diode according to the state of each grid electrode, - Its first gate electrode (G1 h, G2h) is in the second state and its second gate electrode (G1I, G2I) is in the second state, the transistor is in the closed state, - Characterized in that, during each alternation of positive or negative voltage, said process follows the following sequence: o When the first transistor (TH1) is switched from the closed state to a diode operating mode, the diode operating mode is chosen to ensure natural conduction of the second transistor (TL1) according to a diode operating mode of the type freewheel; o When the first transistor (TH1) is switched to the diode operating mode, the second transistor (TL1) is in a diode operating mode chosen to loop back the load current and ensure the continuity of the load current (le) at the wheel free; o When the second transistor (TL1) is switched from the diode operating mode to the closed state, the first transistor (TH1) is maintained in its diode operating mode. 2. Method according to claim 1, characterized in that, when the voltage alternation is positive, the first transistor (TH1) being initially in the closed state and the second transistor (TL1) initially in the diode operating mode, it consists of following the following sequence: o Order the first transistor in the diode operating mode, o After a dead time, order the second transistor in the closed state, o Order the second transistor in the diode operating mode, o After a dead time, order the first transistor in the closed state. 3. Method according to claim 1 or 2, characterized in that, when the voltage alternation is negative, the first transistor (TH1) being initially in the closed state and the second transistor (TL1) initially in the operating mode diode, it consists of following the following sequence: o Order the first transistor in the diode operating mode, o After a dead time, order the second transistor in the closed state, o Order the second transistor in the diode operating mode, o After a dead time, order the first transistor in the closed state. 4. Method according to one of claims 1 to 3, characterized in that it comprises a step of detecting the alternation of the input voltage (Ve) supplied by said power source. 5. Control system for a switching arm which comprises at least a first bidirectional double gate transistor (TH1) and a second bidirectional transistor (TL1) with two gate electrodes connected in series to a power source supplying a voltage input input (Ve) comprising at least one alternating positive voltage followed by alternating negative voltage and controlled to supply an output voltage (Vc) to an electrical load (C) intended to be crossed by a load current (le) and connected in parallel with the second transistor (TL1), said first transistor (TH1) comprising a first gate electrode (G1 h), a second gate electrode (G 11), and the second transistor (TL1) comprising a first gate electrode (G2h), a second gate electrode (G2I), each gate electrode of each transistor may be in a first state or in a second state, each transistor r being ordered so that when: - Its first gate electrode (G1h, G2h) is in the first state and its second gate electrode (G 11, G2I) is in the first state, the transistor is in the open state, The first gate electrode (G1 h, G2h) and the second gate electrode (G11, G2I) are in different states, the transistor is in a diode operating mode, the diode operating mode being reverse diode or direct diode according to the state of each grid electrode, - Its first gate electrode (G1 h, G2h) is in the second state and its second gate electrode (G1I, G2I) is in the second state, the transistor is in the closed state, Said system comprising: Processing means arranged to execute instructions for applying at least one determined command sequence; Data acquisition means used as inputs for applying said command sequence; Control means receiving commands from the processing means and arranged to apply control signals to the gates of the transistors of the switching arm according to the control sequence which is applied; Characterized in that, during each alternation of positive or negative voltage, said system is capable of controlling the following command sequence: o When the first transistor (TH1) is switched from the closed state to a diode operating mode, the diode operating mode is chosen to ensure natural conduction of the second transistor (TL1) according to a diode operating mode of the type freewheel; o When the first transistor (TH1) is switched to the diode operating mode, the second transistor (TL1) is in a diode operating mode chosen to loop back the charging current (le) and ensure continuity of the charging current (le ) coasting; o When the second transistor (TL1) is switched from the diode operating mode to the closed state, the first transistor (TH1) is maintained in its diode operating mode. 6. System according to claim 5, characterized in that, when the voltage alternation is positive, the first transistor (TH1) being initially in the closed state and the second transistor (TL1) initially in the diode operating mode, said system is capable of implementing the following sequence: o Order the first transistor in the diode operating mode, o After a dead time, order the second transistor in the closed state, o Order the second transistor in the diode operating mode, o After a dead time, order the first transistor in the closed state, 7. System according to claim 5 or 6, characterized in that, when the voltage alternation is negative, the first transistor (TH1) being initially in the closed state and the second transistor (TL1) initially in the operating mode diode, said system is capable of implementing the following sequence: o Order the first transistor in the diode operating mode, o After a dead time, order the second transistor in the closed state, o Order the second transistor in the diode operating mode, o After a dead time, order the first transistor in the closed state. 8. System according to one of claims 5 to 7, characterized in that it comprises means for measuring the voltage supplied by said power source. 9. Computer program comprising software instructions intended to be executed on a computer to implement the method as defined in one of claims 1 to 4. 10. Computer readable storage medium comprising the computer program defined in claim 9. 1/8