FR2933546A1 - SOFT ARC WELDING STATION WITH SOFT SWITCHING SOFT RESONANT - Google Patents

Abstract

Quasi-resonant, soft-switching type inverter comprising: - means (4, 6) for connection to an electric power supply (8) having a DC voltage supply terminal (6) and a terminal reference (4), - a first quasi-resonant switching cell (301) and a second switching cell (302) connected in parallel between the supply terminal (6) and the reference terminal (4) , characterized in that it further comprises: - a passive switching pole associated with a first switching cell (301), - an active switching pole associated with the second switching cell (302), - a control device said switching cells (30), delivering signals in dual thyristor logic, and - a control device (28) of said active switching pole, synchronized with said control of the switching cells (30).

Description

The present invention relates to an improved soft-switching quasi-resonant type power source and an arc welding station comprising this inverter, as well as a method for controlling the power delivered by this inverter or substation. welding.

There are inverters for delivering continuous output voltages that operate according to a so-called quasi-resonant soft switching principle. The electrical diagram of such an inverter is known from EP-A-1564876. The switching from a state to a blocked state is carried out in a conventional manner and the rise gradient of the voltage across the switches is advantageously slowed by the capacitors placed in parallel. Switching from a blocked state to an on state can be performed at zero voltage according to the principle of soft switching to zero voltage, upon receipt of a boot command issued by the controller. Indeed, the reactive energy stored in the resonance elements makes it possible to obtain at the output terminals of the cells conditions enabling switching from the off state to the on state corresponding to a soft switching of the so-called zero voltage type. or ZVS (Zero Voltage Switching). Such circuits have a number of advantages, including the reduction of switching losses and electromagnetic interference. However, the smooth switching operation of these circuits occurs only for a certain operating range because it depends on the level of the output current and the supply voltage. This is problematic, particularly in the field of arc welding, since it requires currents whose intensity must vary over a wide range, from vacuum to short circuit. Management of the dead time according to the current is often carried out between the switches of the same switching cell, but this solution proves very complex and in fact inefficient. On the other hand, the setting of the power, at a fixed frequency, is achieved by a so-called phase shift control between the cells. This introduces an operating asymmetry, so that the late-phase cell loses smooth switching operation below a certain large limiting current. An increase in the value of the inductance in series with the transformer makes it possible to extend the range of operation in soft commutation, but this method leads to a loss of power duty cycle ratio and to oscillations across the diodes of the transformer. secondary straightening assembly. A number of techniques already exist to improve the performances of this basic structure. Common techniques are to place auxiliary circuits at the secondary of the inverter transformer, to switch a switching cell in zero voltage mode (ZVS) and the other cell in zero current mode or ZCS (Zero Current Switching), a principle known in the literature by the acronym ZVZCS (Zero Voltage Zero Current Switching). The performance of these circuits is often poor. Also known are EP-A-1564876 and US-A-6016258, wherein smooth switching is achieved over the entire range of charge variation by utilizing the energy stored in inductive components of two auxiliary circuits. , called switching poles, placed on the primary side of the transformer on each arm of the bridge. This eliminates the loss of duty cycle and significantly reduces spurious oscillations across the secondary diodes. On the other hand, these auxiliary circuits increase the conduction losses in the main switches and can seriously deteriorate the efficiency of the inverter. The insertion of a control circuit in these auxiliary circuits can reduce losses by conduction, but its management proves difficult, if not impossible. In addition, management of the dead time between the switches of the same switching cell is essential to avoid sudden de-charges of the capacitors in the switches or to avoid the return in operation in conventional hard switching. The operating reliability of the inverter is not completely guaranteed by this dead time management, which limits the operating frequency of the inverter for high powers. In addition, these auxiliary circuits do not support the abrupt control changes necessary for welding. To solve the problems of adjusting dead times between the switches, a dual thyristor type control card can be used. The principle of such control circuits is described in the document FR-A-2 564 662 and more specifically in the document EP-A-1564874 in the context of the qua-si resonance. Unfortunately, this board operates only over a certain range of welding current because the zero voltage spontaneous ignition conditions are no longer met below a certain current value.

The problem to be solved is therefore to propose: - an inverter that does not have the aforementioned drawbacks and reliably enables smooth switching over the entire operating range in welding, from vacuum to short circuit, to powers and frequencies high, with reduced overall losses; an arc welding station comprising such an inverter; and a method of controlling the power delivered by such an inverter or such a welding station.

The solution of the invention is then a quasi-resonant, soft-switching type inverter comprising: means for connection to an electric power supply source comprising a DC voltage supply terminal and a reference terminal, a first switching cell and a second quasi-resonant switching cell connected in parallel between the DC voltage supply terminal and the reference terminal, characterized in that it further comprises: a pole passive switching device associated with the first switching cell; - an active switching pole associated with the second switching cell; - a device for controlling said switching cells, delivering signals in accordance with a dual thyristor logic; and - a device controlling said active switching pole, synchronized with said control device of the switching cells. According to particular aspects of the present invention, this may have one or more of the following features: - Each switching cell has two switches connected in series between the supply and reference terminals, as well as a terminal output between these two switches, each switch being connected in parallel with a capacitive element. Switch or capacitive element must, here as in the remainder of this description, be understood in terms of function; that is to say that each switch or capacitive element may consist of several elements together ensuring a switch or capacitor function. To constitute a switch capable of passing a certain power, the skilled person may in particular put several switches in parallel. It can do the same for capacitive elements. - The passive switching pole comprises:. a capacitive divider formed of two capacitive elements arranged in series between the supply and reference terminals, an intermediate supply terminal taken between these two capacitive elements, connected to the output terminal of said first switching cell via an inductive element and whose potential varies between the potentials of said supply and reference terminals , and. two diodes connected in series between the supply and reference terminals, and in parallel with each capacitive element. Here, as in the remainder of the description, the inductive elements may naturally consist of several elements that together perform this function and the diodes may consist of several elements that together perform this function. - The active switching pole comprises:. a capacitive divider formed of two capacitive elements arranged in series between said supply and reference terminals, an intermediate power terminal taken between these two capacitive elements and connected to the output terminal of said second switching cell via an inductive element in series with a head-to-tail connection of two switches controlled by said device command of the active pole, and. two diodes connected in series between the supply and reference terminals, and in parallel with each capacitive element.

The control device of the switching cells comprises: a control device providing control signals corresponding to blocking commands or boot permissions,. a circuit for detecting the voltage between the power electrodes of each switch providing logic two-state voltage signals comprising a high state corresponding to a voltage between the electrodes of substantially zero power and a low state corresponding to a voltage of approximately 20%; significantly different from zero, and. a control circuit receiving said control and voltage signals and delivering to each switch of the switching cells a control signal corresponding to a blocking command when said control signal corresponds to a blocking command and / or when the voltage between the power electrodes is substantially different from zero, or corresponding to a priming authorization when said control signal corresponds to a priming authorization and the voltage between the power electrodes is substantially zero. The switches of the switching cells are of MOSFET type and controlled in dual thyristor mode and the switches of the active switching pole are of the IGBT type and controlled in thyristor mode. The control device of said switching cells supplies to said first switching cell corresponding to the passive switching pole control signals in advance of a given duration with respect to the signals delivered to said second switching cell corresponding to the active pole. The control devices of the active switching pole and the switching cells deliver synchronized control signals as follows: the ignition command transmitted by the control signal of a first switch of the active switching pole is in advance of a given duration, or time in advance, on the blocking command transmitted by the signal of controlling the switch of the switching cell in which said first switch is capable of delivering a current,. the duration of the control signal of said first switch of the active switching pole is greater than or equal to twice said advance time,. the boot order transmitted by the control signal of the second switch of the active switching pole is also in advance by a time equal to said advance time on the blocking command transmitted by the control signal of the switch of the switching cell in which said second switch is capable of delivering a current, and. the duration of the control signal of said second switch of the active switching pole is greater than or equal to twice said advance time.

According to another aspect, the invention also relates to an arc welding station, characterized in that it comprises at least one inverter according to the invention. This arc welding station may further comprise the following elements: a DC voltage source connected to at least one inverter whose output terminals form the welding terminals; an associated control device; input of a welding setpoint connected to said dis-positive control of said at least one inverter. According to another aspect, the invention relates to a method for controlling the inverter or welding station according to the invention, delivering a given power, characterized in that the power delivered is increased or decreased, respectively, by reducing or increasing, respectively, the advance of the control signals of the first switching cell corresponding to the passive switching pole with respect to the control signals of the second switching cell corresponding to the active switching pole.

The invention will be better understood on reading the description and the following examples, which are not limiting. They refer to the appended drawings, in which: FIG. 1 shows an electrical diagram of an inverter according to the invention; 2A to 2K represent the different sequences of the inverter function described with reference to FIG. 1; 3A-3F shows a timing diagram of different signals during operation of the inverter described with reference to FIG. 1; FIG. 4 is a block diagram of an inverter welding machine according to the invention. According to an exemplary embodiment described in FIG. 1, the inverter 38 is connected between the reference terminals 4 and 6 supply, the DC voltage source 8, which delivers a DC voltage of about 600 volts.

The inverter 38 comprises two cells or switching arms 301 and 302, arranged in parallel between the terminals 4 and 6 and each having two switches connected in series between the terminals 4 and 6. These switches are generally designated by the reference numeral 32 and in particular by the references 321,1, 321,2, 322,1 and 322,2. The switches 32 are arranged in parallel with a capacitive element 34 for switching assistance and forming a resonance element. In the example, the switches 32 are so-called MOSFET type switches such as for example the components designated IXKN45N80C. Capacitive elements 34 are capacities of 4.7 nF (nanofarads).

The switching cell 301 has an output terminal 361 between the two switches 321,1 and 321,2 and the switching cell 302 has an output terminal 362 between the switches 322,1 and 322,2. The inverter 38 also comprises a transformer 40 consisting of two coupled transformers 401 and 402, whose windings are connected in series to the primary and parallel to the secondary. The primary is connected in series with the outputs 361 and 362 of the two switching cells 30. The secondary is connected to a diode rectifier 47 and 48 delivering a DC output voltage of the inverter. The transformer 40 is in the example a planar transformer coupled with twice 10 kW, this technology being particularly suitable for high power and high frequency applications. Such a transformer is conventional in the field of power electronics and will not be described in more detail. The inverter 38 also comprises an inductive element 42 arranged in series between the output terminal 361 of the first switching cell 301 and the primary of the transformer 40. This inductive element 42 is an optional element intended to reduce the electromagnetic disturbances, thanks to its influence on the rate of rise and fall of the current at the primary level. Optionally, this inductive element 42 is formed by the leakage inductance of the transformer 40. In the example, this inductive element 42 consists of the leakage inductance of the transformer 40 of a value of 1.2 pH (micro -Henry). The secondary of the transformer 40 is connected to a conventional type rectifier 44 using DSEP 2x101 diodes (400 volts of twice 100 A), and a current smoothing inductance 49 of a pH value of 10. The output terminals of the rectifier 44 directly form the output terminals of the inverter 38 and are designated by the reference 46. The inverter 38 comprises a first passive switching pole consisting of a capacitive divider 311 formed of two elements. capacitors 551,1 and 551,2 arranged in series between said power supply terminals 6 and reference 4, said capacitive divider 311 comprising a terminal taken between the two capacitive elements and forming an intermediate power supply terminal 561, the output terminal 361 said cell 301 being connected to the intermediate supply terminal 561 via an inductive element 581, and diodes 531,1 and 531,2 connected in series between the power supply 6 and reference 4 terminals, and in parallel with each capacitive element 551,1 and 551,2. In the example, the capacitive elements 551,1 and 551,2 are 10 nF capacitors; the element 581 is an inductance of 80 pH and the diodes 531.1 and 531.2 are of the BYT30P-1000 type (30 A, 1000 V). The inverter 38 comprises a second active switching pole consisting of a capacitive divider 312 formed of two capacitive elements 552, 1 and 552, placed in series between said supply and reference terminals 4, capacitive divider 312 having a terminal taken between the two capacitive elements and forming an intermediate supply terminal 562, the output terminal 362 of the cell 302 being connected to the intermediate supply terminal 562 via an inductive element 582 , arranged in series with a head-to-tail arrangement of two switches 70 and 71 controlled by a device 28, and diodes 532, 1, and 532, connected in series between the supply and reference terminals 4, and in parallel with each capacitive element 552,1 and 552,2. With the addition of the switches 70 and 71, the current in the pole is delivered only during the switching phases, which reduces conductive losses in the switches 322,1 and 322,2. In the example, capacitive elements 552,1 and 552,2 are capacitors of 1 F; the element 582 is an inductance of 3 pH, the diodes 532.1 and 532.2 are of the BYT30P-1000 type; the switches 70 and 71 are IGBTs (600 V, 100 A) connected in anti-series. The inverter 38 also comprises a control device 18 delivering control signals to the switches 32 corresponding to blocking commands or priming authorizations. Such a control is carried out by a so-called dual thyristor logic principle and will be described in more detail later with reference to FIG. 1. The inverter 38 further comprises a control device 28 delivering control signals Sth1 and Sth2 to Switches 70 and 71 corresponding to synchronous initiation or blocking orders of the control signals Sc2, 1 and Sc2, 2 of the control device 18. These signals are adapted to deliver pulse-type currents intended to be switched over. switches 322,1 and 322,2 in zero voltage mode (ZVS). The operating principle of this command is described later. The circuit as described makes it possible to obtain at the output terminals 46, using a 100 kHz operation command of the type controlled blocking and spontaneous ignition, a voltage of 0 to 50 volts and a current of 0 at 500 amps. In fact, the switching poles make it possible to obtain the spontaneous ignition of the switches 32 without any lower current limit. Furthermore, the components used, especially in the inverter, can be made in several different ways.

The switches 32 may be conventionally formed from one or more identical MOSFET transistors placed in parallel, so that the switches as a whole are unidirectional in voltage and bidirectional in current. The capacitive elements 34 and 55 may be formed of several capacitors arranged in parallel. The number and the nature of each of the electronic components used vary according to the maximum power that the inverter must deliver.

The operation of a circuit according to the invention will now be described by way of example with reference to FIG. 1. The circuit being of a periodic symmetrical operation in time, it will be described over a half-period in reference to the sequences shown in FIGS. 2A to 2K and the timing diagrams of the various signals in FIGS. 3A to 3E. On these timing diagrams, the voltage and the intensity across different components are represented, referenced respectively by the letters V and I with the component number in index. The commands of each of the main and auxiliary switches 70, 71 are also shown in the timing diagram of FIG. 3A, a blocking state appearing as a low level signal and a boot state in the form of a high level signal, as well as their time offsets. The operation of the circuit is decomposed according to eleven sequences SO to s10. Initial Sequence SO (FIG. 2A): Active Power Transfer Phase The switches 331,1, 332,2 and the diode 47 conduct while the switches 331,2, 332,1 and the diode 48 are off. The primary windings of the transformer 40 see a constant positive voltage (V40 = V8). The current in the output filter inductor 49 is returned to the primary via the diode 47 and the transformer 40. The current of the switch 331, 1 is the sum of the current in the output inductor 49 at the output. primary and current in inductance 581 of the switching pole. This sequence ends, blocking the switch 331,1 by the command. Sequence S1 (Fig. 2B): Controlled blocking of switch 331,1 and linear phase of charging and discharging capacitors 341,1 and 341,2 At the beginning of this sequence switch 331,1 is controlled at blocking and no other change in state of the switches occurs during this interval, the duration of which is the charging and discharging time of the capacitors 341, 1 and 341, 2. As the switch 331,1 is off, the sum of the current in the inductor 42 and in the inductance 581 of the passive pole starts charging the capacitor 341,1 and discharging the capacitor 341,2 simultaneously. The voltages across the two switches 331,1 and 331,2 are translated, respectively, by the equations: f581 +149 1581 +149 V3311 = V3411 = V8- mt V332 = V342 = mt 2 C3411 2 0341 2 t: current time 11 03411, 0341,2: capacities of the capacitors 3411 and 3412 m: transformation ratio of the transformer 40. Due to the presence of the capacitor 341,1, the voltage across the switch 331,1 can only grow slowly, allowing blocking with reduced losses. The capacitor 341,2 discharges during this time interval. As soon as it is completely discharged, the diode 351,2 in antiparallel with the switch 331,2 closes spontaneously, allowing the continuity of the current. The voltage across the switch 331.2 is maintained at zero creating the conditions of spontaneous ignition in zero voltage mode (ZVS).

Sequence S2 (Fiq.2C): Freewheel phase without power transfer

As the diode 351,2 is conducting, as the switch 332.2 is still on, the primary winding of the transformer 40 sees a zero voltage after the cancellation of the voltage across the capacitor 351.2. The voltage across the diode 48 is zero and the two diodes 47 and 48 are then passing in a freewheel mode. The primary current in the transformer 40 is kept constant. The current in inductor 581 begins to grow from the negative peak value. The duration of this freewheeling phase is determined by the phase shift time necessary to adjust the power transfer. Sequence S3 (2D Fiq): Controlled priming of the switch 71 The auxiliary switch 71 is started. The current in the inductor 582 starts to grow from zero. The switch 332.2 sees the sum of the primary current in the transformer 40 and the current in the inductance 582.

Sequence S4 (FIG. 2E): Blocking of the diode 531.1 The diode 531.1 of the passive pole is blocked and the continuity of the current is ensured by the capacitors 551,1 and 551,2 of the passive pole. The blocking instant of this diode 531.1 depends on the parameters of the passive pole (value of the inductance 581 and the capacitors 531, 1 and 531, 2). Sequence S5 (FIG. 2F): Controlled blocking of the 332.2 switch and oscillatory phase charging and discharging capacitors 342.1 and 342.2 At the beginning of this sequence, the switch 332.2 is controlled blocking. The current in inductor 582 is at its peak peak value. No other switches change state during this interval. The duration of this interval is the charging and discharging time of the capacitors 342, 1 and 342.2. Similar to sequence 1, this current starts charging capacitor 342,2 and discharging capacitor 342,1. The voltage across the capacitor 342.2 begins to grow from zero, while the voltage across the capacitor 342.1 begins to decrease from the supply voltage 8. As soon as the voltage across the capacitor 342 , 1 begins to decrease, the transformer 40 begins to see a negative voltage because the diode 341,2 is already busy. The current of the output inductance 49 is reamed at the primary via the diodes 47 and 48 and the transformer 40. As this interval is very short, the current in the inductance 582 remains almost constant at its maximum peak value.

As in sequence 1, we find: I582 + 149 mt V3321 = V3421 = V8 - 03421 Thanks to the effect of the capacitor 342.2, the voltage across the switch 322.2 can only grow slowly, ensuring the limited loss blocking switch for switch 322.2. The gradual discharge of the capacitor 342,1 reduces to zero the voltage across the switch 322.1 during this interval, allowing spontaneous ignition in zero voltage mode of the switch 322.1. During this interval, the current of the arm 302 is equal to the sum of the current in the output filter inductance 49 brought back to the primary and the current in the inductor 582. But the current ripple in the inductance 49 is at its low value (this shows the opposite effect of the ripple of the current of the load on this arm during switching), and taking into account the resistances of the I582 + m V332,2 = V342 2 = t 2 C342, 2,149 components 351,2 and 332,2, the primary current is damped and is not perfectly constant during the freewheel phase. This reduces the current constraints of the switch 332.2 on the blocking but also reduces the current required to unload the capacitor 342.1. To obtain the spontaneous ignition of the switch 322, the capacitor 342,1 must be completely discharged during the time allotted to it (dead time for example). Otherwise, if it is not completely discharged due to insufficient current amplitude, the switch 322.1 will lose spontaneous initiation switching. With a conventional control, the energy stored in the capacitor 342.1 will be suddenly discharged into the switch 322.1 at its initiation. In the case of a dual thyristor logic, the inverter stops naturally.

Sequence S6 (Fiq.2G): Linear phase of decay of the primary current At the beginning of this sequence, the diode 352.1 spontaneously initiates in zero voltage mode. No other change of state of the switches occurs during this interval. Since diode 352.1 is on, inductor 582 sees a negative negative voltage -V8 / 2. The current starts to decrease linearly according to the equation: V8 t + I582max 2L582 L58, inductance value 582 Sequence S7 (Fiq, 2H): linear phase of decay of the primary current and spontaneous blocking of the switch 71 L auxiliary switch 71 is blocked spontaneously. From this moment, its signal Sth2 can be extinguished. The primary current continues to decrease linearly. This sequence ends the blocking of the diodes 351,2 and 352,1 when the currents which pass in these diodes cancel each other out.

I582 = This sequence depends on the parameters of the active auxiliary circuit and the control phase advance time of the auxiliary switch 71.

Sequence S8 (Fiq 21): Linear phase of decay and inversion of the primary current

The diodes 351,2 and 352,1 lock spontaneously when the primary current is canceled. Continuity of current is provided by the main switches 331,2 and 332,1, if they are already controlled at boot.

Sequence S9 (Fiq.2J): Blocking the secondary diode 47

The secondary diode 47 spontaneously locks when the primary current in the transformer 40 has reached the current imposed by the load. Sequence S10 (Fiq.2K): spontaneous priming of diode 531.2

The diode 531,2 of the passive pole spontaneously initiates the cancellation of the voltage across the capacitor 551,2. This sequence depends on the parameters of the passive pole. Switches 331.2 and 332.1 are on and switches 331.1 and 332.2 are off. The diode 531,2 is on and the diode 531,1 is blocked. This sequence is symmetrical to the initial sequence So. Another operating cycle symmetrical to the 11 pre-sequential sequences begins and the converter then periodically repeats the operation process.

The operation of the active pole of the example will now be described by showing the synchronization of the commands 28 of the auxiliary switches 70 and 71 with the commands 18 of the main switches 32. The auxiliary switch 70 (respectively 71) is initiated with an advance phase tr before blocking the switch 332.1 (respectively 332.2). This phase advance and the value of the choke 582 determines the duration and the peak value of the current pulse sent to the main switch to switch to zero voltage. The operation of the circuit and the waveforms in the different elements are shown in Figure 3E for switching the switch 332.2.

It is assumed that the capacitors 552, 1, and 552, 2 are large (for example of the order of 1 F) to have constant voltages at their terminals during switching. Initially the primary current in the transformer 40 is assumed positive and flows in the main switch 332.2. To start the switching process, the auxiliary switch 71 is controlled at boot. A voltage of 2 g is applied across the inductance 582 and the current in it increases linearly with a slope of V8. During this time, the main switch L582 332,2 remains on. When the current in inductance 582 reaches its maximum peak value determined by the time tr and the value of inductance 582, the switch 332.2 is controlled at blocking. A resonance phase begins and capacitor 342.2 charges, while 342.1 discharges. When the voltage across capacitor 342,1 goes through zero, diode 352.1 spontaneously initiates. The main switch 322,1 can now be started under zero voltage. Once the diode 352.1 conducts, the current in the inductor 582 decreases to zero with a slope of -vg. From 2 L582 this moment, the auxiliary switch 71 is blocked at zero current. The maximum current peak in inductance 582 is given by: f582max = tr v8 (tr: phase advance time of the control of the 2L582 thyristor 71 with respect to the lock control of the switch 332,2). total switching time is given by:

tc = 2tr At high load current, the energy stored in the inductor 42 may be sufficient to switch the main switches 322,1 and 322,2 to zero voltage. In this case, the commands of the auxiliary switches 70 and 71 can be inhibited. We will now show the functional peculiarities of the clipped passive pole of the example, constituted by the elements 581, 551, 551, 531, and 531, respectively. The shape of the current is oscillatory with a flat portion of which depends on the values of the elements 581, 551,1 and 551,2 and the switching frequency fc of the inverter. The voltages across the capacitors 551,1 and 551,2 are discontinuous and vary between 0 and the supply voltage V8. The natural frequency of the resonant circuit is given by: f = 1 = Wp. p 27c ,, / 2 C551 L581 27c With c55, = c55 ,,, = c55,, 2 (value of the capacitors of the passive pole). The values of capacitors 551,1 and 551,2 are identical.

Note the ratio between the operating frequency of the inverter and the natural frequency of the passive pole, ie fp af = ù.

fc The peak amplitude is given by the expression: 1581 max = 2C551 V8 221 fp) = 2 V8 C551 C0p For the same current peak 1581max, the duration of the flat portion due to clipping is a function of af with : V8 / 1581 max _ V8 / 1581 max and 2 C 158max / V8 1581 max / V8 L581 ù 27G afc Cep 551 = 217c af fc = Cep The minimum current of the pole for smooth switching to zero voltage is given by : 1581 min = V8. \ / 2C341 / L42, with 0341 = 03411 = 03412 Calculations and simulations are used to determine the value of the components for the pole circuit as a function of the switching aid capacitors 341,1 and 341 2.

For control with sudden and large phase shift variations, a sufficiently flat bearing portion is required to maintain the same peak current level.

We will now describe the dual thyristor logic control principle of the example. The purpose of this control is to solve the problem of managing the dead time between the switches of the same cell by naturally making the commutations complementary. This control is characterized in that it comprises a circuit for detecting the voltage between the power electrodes of each switch of the inverter delivering voltage signals and a control circuit receiving the said control signals emitted by the circuit. as well as said voltage signals and adapted to supply each of the switches with a control signal corresponding to a blocking command when said control signal corresponds to a blocking command and / or when the voltage between the power electrodes is substantially different from zero and corresponding to a priming authorization when said control signal corresponds to a priming authorization and that the voltage between the power electrodes is substantially zero.

According to the embodiment described in FIG. 1, the power source comprises a control device 18 outside the inverter 38 and adapted for a forced control of blocking the switches 32 and their spontaneous ignition. Each of the switches 32 receiving a signal Sci, 1, Sc1,2, Sc2,1 and Sc2,2 carrying blocking commands or priming authorizations.

The control signals Sc of the switches 32 of one and the same cell are complementary to one another and the control signals of two opposite switches of a diagonal are out of phase for the adjustment of the power transfer. Thus, the signals Sci, l and Sci, 2 are complementary, as are the signals Sc2,1 and Sc2,2, and the signals Sc1, l and Sc2,2 are out of phase, as are the signals Sci, 2 and Sc2 1. In particular, the signals Sci, I and Sci, 2 are backwards from the signals Sc2, 1 and Sc2, 2. Each of the circuits 50 comprises an inverter comparator 52, connected between the terminals of the switches 32, so as to compare the voltage levels of each of the terminals, or to compare the voltage across the switches 32 with respect to zero. For each detection circuit 50, a reference voltage generator 54 is furthermore interposed between an input terminal of the comparator 52 and a terminal of a switch 32. This reference voltage is small relative to the maximum voltage that may appear. between the power electrodes of a switch 32, for example of the order of 17V. Thus, each circuit 50 allows the detection of a zero or almost zero voltage, across a switch 32. The detection of such a voltage results in the emission of a voltage signal St which is in a state logic high when the voltage across the corresponding switch 32 is zero or almost zero and in a low logic state the rest of the time. Finally, the device also comprises an additional control stage formed of a control circuit 60 interposed between the control device 18 and the switches 32. This circuit 60 receives as input the control signals Sc emitted by the control device 18 and that the voltage signals St emitted by the detection circuits 50. In the embodiment described, the control circuit 60 comprises several logical units 62 designed to perform, for each switch 32, a logic function AND between its control signal Sc and its voltage signal St and deliver a control signal Sp to the corresponding switch 32. Thus, the logic unit 621,2 delivers a signal Sp1,2 which corresponds to a logic function AND between the control signal Sc1,2 for the switch 321,2 and the voltage detection signal St1,2 delivered by the circuit 501,2 for detecting the voltage across the switch 321,2. In the embodiment described, the driving signal Sp is directly applicable to each of the switches 32. Depending on the nature of the switches 32, an adaptation circuit can be inserted between the output of the logic units 62 and the switches 32 in order to to allow the generation of a control signal adapted to the switches. In operation, the control signals Sc delivered by the control device 18 have two levels corresponding to a high logic state for a boot authorization and a low logic state for a blocking command. The control circuit 60 therefore transmits a blocking command by supplying each switch 32 with a low level logic control signal Sp when it has received a control signal SC of the same logic level and / or when the potential difference across the switch 32 is greater than the reference voltage generated by the generator 54, that is to say when the signal St is at a low level. The blocking commands issued by the control device 38 are therefore directly transmitted to the switches. On the other hand, a boot authorization corresponding to a control signal Sc with a high logic high level, will only be transmitted when a zero or almost zero voltage is detected at the terminals of the corresponding switch, ie say when the voltage detection signal St is also at a high level. The device therefore makes it possible to ensure that the switches 32 of the inverter 18 receive a priming authorization issued by the control device 18 only when the voltage at their terminals is zero or almost zero.

The application of such a control circuit to the inverter 38, thus prevents a short circuit on a switching cell of the inverter, thus increasing its reliability. In addition, the overall efficiency of the inverter is improved by eliminating or at least reducing the required dead time between the boot controls and the existing blocking commands in the state of the art inverters. , the control of such an inverter is thus simplified.

With reference to FIG. 4, an example of an inverter arc welding station according to the invention will now be described. The welding station 100 is connected to an electrical energy transfer network, for example a three-phase network 102. This three-phase network 102 delivers alternating voltages to a rectifier 104 forming a DC voltage source to which an inverter 108 is connected. corresponding to the inverter 38 as described with reference to Figure 1. The rectifier 104 and the inverter 108 thus combined form a power converter between an AC voltage source and a DC voltage source and reciprocally.

The output terminals of the inverter 108 are connected to terminals 110 forming the welding terminals for carrying out an arc welding. Furthermore, the welding station 100 also comprises means 112 for entering a setpoint for welding. This instruction is transmitted to a control device 114 corresponding to the control devices 18 and 28 described with reference to FIG. 1. The control device 114 finally delivers control signals to the inverter 108 for the formation of a output signal at the terminals 110, corresponding to the set point. Of course, different types of instructions can be envisaged depending on the desired applications. In particular, the inverter of the invention can be used in a smooth or pulsed arc welding station. Finally, although the invention has been described in the context of welding, it is also possible to use the inverter of the invention in other fields of application, for example the charging of rechargeable batteries or stabilized power supplies. common.

The inverter of the invention has a significant number of advantages over existing inverter substations, including:

- the reduction of losses by switching in the switches, allowing access to the high switching frequencies, which themselves allow a reduction in the weight, volume and cost of the elements (transformer, inductors, dissipators ... etc), - the reduction of electromagnetic disturbances, - the smooth switching operation over the entire range of the welding current (from vacuum to short circuit), - the reduction of switching losses in the auxiliary switches in the poles by means of control the width of the pulses of the control signals Sth1 and Sth2. - the reduction of additional conduction losses due to the switching poles, - the use of semiconductor switches under favorable switching conditions: MOSFET in ZVS mode and IGBT in ZCS mode, - high reliability thanks to the dual thyristor logic: no dead time management and, in case of erroneous control or non-operation in soft switching, natural shutdown of the inverter. In tests of the inverter according to the invention, the converter was controlled at a frequency of 100 kHz (200 kHz of output ripple) or 200 kHz (400 kHz output) with a power output of 100 kHz. order of 20 kW. At this power, such control frequencies go beyond what is allowed by conventional inverters. Comparisons with existing inverters have furthermore shown a weight gain of almost 40% (from 21 kg to 13 kg), for an operating frequency of 100 kHz instead of 40 kHz and the same power of the order of 20 kW.

Claims (11)

REVENDICATIONS1. Quasi-resonant, soft switching type inverter comprising: - means (4, 6) for connection to a power source (8) for electrical energy comprising a DC voltage supply terminal (6) and a reference terminal (4), - a first quasi-resonant switching cell (301) and a second switching cell (302) connected in parallel between the supply terminal (4) and the reference terminal ( 6), characterized in that it further comprises: - a passive switching pole associated with the first switching cell (301), - an active switching pole associated with the second switching cell (302), - a device controlling said switching cells (30), delivering signals according to dual thyristor logic, and - a controller (28) of said active switching pole, synchronized with said switch cell controller (30). 2. Inverter according to claim 1, characterized in that each switching cell (30) has two switches (32) connected in series between the supply and reference terminals (4, 6) and a terminal outlet (36) between these two switches, each switch (32) being connected in parallel with a capacitive element (34). 3. Inverter according to one of claims 1 to 2, characterized in that the passive switching pole comprises: - a capacitive divider (311) formed of two capacitive elements (551,1, 551,2) arranged in series between the supply (6) and reference (4) terminals, - an intermediate power terminal (561) between these two capacitive elements, connected to the output terminal (361) of said first switching cell (301) by intermediate of an inductive element (581) and whose potential varies between the potentials of said supply (6) and reference (4) terminals, and - two diodes (531,1, 531,2) connected in series between the supply (6) and reference (4) terminals, and in parallel with each capacitive element (551,1, 551,2). 4. Inverter according to one of claims 1 to 3, characterized in that the active switching pole comprises: - a capacitive divider (312) formed of two capacitive elements (552,1, 552,2) arranged in series between said supply (6) and reference (4) terminals, - an intermediate power terminal (562) between these two capacitive elements and connected to the output terminal (362) of said second switching cell (302) by intermediate of an inductive element (582) in series with a head-to-tail arrangement of two switches (70, 71) controlled by said control device (28) of the active pole, and - two diodes (532, 1, 532, 2) connected in series between the supply (6) and reference (4) terminals, and in parallel with each capacitive element (552.1, 552.2). 5. Inverter according to one of claims 1 to 4, characterized in that the control device of the switching cells (30) comprises: - a control device (18) delivering corresponding control signals (Sc) with blocking commands or priming authorizations, - a circuit (50) for detecting the voltage between the power electrodes of each switch (32) delivering voltage signals (St) with two logic states including a state high corresponding to a voltage between the electrodes of substantially zero power and a low state corresponding to a voltage substantially different from zero, and - a control circuit (60) receiving said control signals (Sc) and voltage (St) and supplying each of the switches (32) of the switching cells (30) with a control signal (Sp) corresponding to a block command when said control signal (Sc) corresponds to a blocking command and / or when the voltage between the power electrodes is substantially different from zero, or corresponding to a priming authorization when said control signal (Sc) corresponds to a priming authorization and the voltage between the power electrodes is substantially zero. 6. Inverter according to one of claims 1 to 5, characterized in that the switches (32) of the switching cells (30) are of the MOSFET type and controlled in dual thyristor mode and that the switches (70, 71) of the pole active switching are IGBT type and controlled in thyristor mode. 7. Inverter as defined by one of claims 1 to 6, characterized in that the device (18) for controlling said switching cells (30) delivers to said first switching cell (301) corresponding to the passive switching pole. control signals (Sci, i, Sc1,2) in advance of a given duration (ta) with respect to the signals (Sc2,2, Sc2,1) delivered to said second switching cell (302) corresponding to the active pole . 8. Inverter as defined by one of claims 1 to 7, characterized in that the control devices (28, 18) of the active switching pole and the switching cells (30) supply control signals ( Sth, Sc) synchronized in the following manner: - the firing order transmitted by the control signal (Sth1) of a first switch (70) of the active switching pole is in advance of a given duration, or time in advance (tr), on the blocking command transmitted by the control signal (Sc2,1) of the switch (322,1) of the switching cell (302) in which said first switch (70) is capable of delivering a current, - the duration of the control signal (Sth1) of said first switch (70) of the active switching pole is greater than or equal to twice said advance time (tr), - the boot order transmitted by the control signal (Sth2) of the second switch (71) of the active switching pole is also in advance of a hard ee equals said advance time (tr) on the blocking command transmitted by the control signal (Sc2,2) of the switch (322,2) of the switching cell (302) in which said second switch (71) is capable of delivering a current, and - the duration of the control signal (Sth2) of said second switch (71) of the active switching pole is greater than or equal to twice said advance time (tr). 9. Arc welding station characterized in that it comprises at least one inverter as defined in any one of claims 1 to 8. 10. An arc welding station according to claim 9, characterized in that it further comprises: - a DC voltage source (104) connected to at least one inverter (108) whose output terminals (110) form the welding terminals, - an associated control device (114), - means (112) for input of a welding setpoint connected to said device (114) for controlling said at least one inverter (108). 11. The method of controlling the inverter according to one of claims 1 to 8 or the welding station according to one of claims 9 or 10, delivering a given power, characterized in that the power delivered is increased or decreased, respectively, by reducing or increasing, respectively, the feedrate (ta) of the control signals (Sci, 1, Sc1,2) of the first switching cell (301) corresponding to the passive switching pole with respect to the control signals (Sc2,2, Sc2,1) of the second switching cell (302) corresponding to the active switching pole.